Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

462

Datasheet

12

0b

RO

This is the value that is sampled on the GPIO_Data pin as an 

input.  

This input is synchronized to the Core Clock domain. Because the default setting is this 

buffer is an input, this bit is undefined at reset. 

AccessType: Read Only

11

1b

RW

This is the value that should be place on the GPIO Data 

pin as an output. This value is only written into the register if GPIO DATA MASK is also 

asserted. The value will appear on the pin if this data value is actually written to this 

register and the GPIO Data DIRECTION VALUE contains a value that will configure the 

pin as an output. 

Default = 1. The GPIO default clock data value is programmed to 1 in hardware. The 

hardware drives a default of 1 since the I2C interface defaults to a 1 . (this mimics the 

I2C external pull-ups on the bus)

10

0b

WO

This is a mask bit to determine whether the GPIO DATA 

VALUE bit should be written into the register. This value is not stored and when read 

returns 0. 

0 = Do NOT write GPIO Data Value bit (default). 

1 = Write GPIO Data Value bit. 

AccessType: Write Only

9

0b

RW

This is the value that should be used to 

define the output enable of the GPIO Data pin. This value is only written into the register 

if GPIO Data DIRECTION MASK is also asserted. The value that will appear on the pin is 

defined by what is in the register for the GPIO DATA VALUE bit.  

0 = Pin is configured as an input (default) 

1 = Pin is configured as an output.

8

0b

WO

This is a mask bit to determine whether the 

GPIO DIRECTION VALUE bit should be written into the register. This value is not stored 

and when read always returns 0. 

0 = Do NOT write GPIO Data Direction Value bit (default). 

1 = Write GPIO Data Direction Value bit.  

AccessType: Write Only

7:5

0b

RW

must be written with zeros.

4

0b

RO

This is the value that is sampled on the GPIO Clock pin 

as an input. 

This input is synchronized to the Core Clock domain. Because the default setting is this 

buffer is an input, this bit is undefined at reset.  

AccessType: Read Only

3

1b

RW

This is the value that should be place on the 

GPIO Clk pin as an output. This value is only written into the register if GPIO Clock DATA 

MASK is also asserted. The value will appear on the pin if this data value is actually 

written to this register and the GPIO Clock DIRECTION VALUE contains a value that will 

configure the pin as an output. 

Default = 1. The GPIO default clock data value is programmed to 1 in hardware. The 

hardware drives a default of 1 since the I2C interface defaults to a 1 . (this mimics the 

I2C external pull-ups on the bus)

2

0b

WO

This is a mask bit to determine whether the GPIO 

Clock DATA VALUE bit should be written into the register. This value is not stored and 

when read always returns 0. 

0 = Do NOT write GPIO Clock Data Value bit (default). 

1 = Write GPIO Clock Data Value bit.  

AccessType: Write Only

1

0b

RW

This is the value that should be used to 

define the output enable of the GPIO Clock pin. This value is only written into the 

register if GPIO Clock DIRECTION MASK is also asserted. The value that will appear on 

the pin is defined by what is in the register for the GPIO Clock DATA VALUE bit.  

0 = Pin is configured as an input and the output driver is set to tri-state (default) 

1 = Pin is configured as an output.