Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

509

mipi pipe A interrupt enable register

16

0b

RW

Set to '1' if the received data type is not 

recognised

15

0b

RW

Set to '1' if the computed CRC differs from the received CRC 

value during the reception of packets by Arasan_DSI host.

14

0b

RW

Set to '1' if there is no ECC correction for the packet or 

there are more than 2 bit errors in the packet received by Arasan_DSI_host

13

0b

RW

Set to '1' if ECC syndrome was computed and is 

corrected for one bit error during the reception of packets by the Arasan_DSI_host

12

0b

RW

Set to '1' if a control error is observed on the lanes by 

the Arasan_DSI_host

11

0b

RW

Set to '1' if the virtual channel ID is invalid by the display 

device is reported in the Acknowledge packet by the display device

10

0b

RW

Set to '1' if the data type is not recognised 

by the display device is reported in the Acknowledge packet by the display device

9

0b

RW

Set to '1' if the computed CRC differs from the received CRC 

value and is reported in the Acknowledge packet by the display device

8

0b

RW

Set to '1' if there is no ECC correction for the packet or 

there are more than 2 bit errors in the packet is reported in the Acknowledge packet by 

the display device

7

0b

RW

Set to '1' if ECC syndrome was computed and 

corrected for one bit error is reported in the Acknowledge packet by the display device

6

0b

RW

Set to '1' if a control error is reported in the 

Acknowledge packet by the display device

5

0b

RW

Set to '1' if the high speed receive timer value 

expires and data transfer lasts on the data lane is reported in the Acknowledge packet 

by the display device

4

0b

RW

Set to '1' if Low power transmission sync error occurs in 

the display device and is reported in the Acknowledge packet by the display device

3

0b

RW

Set to '1' if Escape Mode Entry command is not 

understandable by the display device and is reported in the Acknowledge packet by the 

display device

2

0b

RW

RX eot sync Error

1

0b

RW

Set to '1' if a start of transmission synchronisation error is 

reported in the Acknowledge packet by the display device

0

0b

RW

Set to '1' if a start of transmission error is reported in the Acknowledge 

packet by the display device

Memory Mapped I/O Register

(Size: 32 bits)

PCI Configuration Register (Size: 32 

bits)
GTTMMADR_LSB Reference: 

[B:0, D:2, F:0] + 10h