Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
533
14.10.75 MIPIA_HS_LS_DBI_ENABLE_REG—Offset B078h
Note : dbi_hs_lp_switch_reg has to be written only if DBI FIFO is empty
Access Method
Default: 00000000h
14.10.76 MIPIA_RESERVED—Offset B07Ch
Reserved.
Access Method
Default: 00000000h
0
0b
RO
HS_DATA_FIFO_FULL:
Default 0
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RES
E
RVE
D
DBI_H
S
_LS_SWIT
CH_RE
Bit
Range
Default &
Access
Field Name (ID): Description
31:1
0b
RW
RESERVED:
Reserved.
0
0b
RW
DBI_HS_LS_SWITCH_RE:
Set to 1 if DBI packets have to be transmitted in Low
power mode
Set to 0 if DBI packets have to be transmitted in High speed mode
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h