Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Physical Interfaces
Intel
®
Atom™ Processor E3800 Product Family
54
Datasheet
2.25
JTAG and Debug Interface Signals
Note:
S0ix is not supported for Bay Trail-M/D SKUs and Bay Trail-I SKUs.
2.26
Miscellaneous Signals
PMC_CORE_PWROK
I
VRTC
V
IL
V
IL
V
IL
V
IH
PMC_RSMRST#
I
VRTC
V
IH
V
IH
V
IH
V
IH
NOTE: All signals with the “†” symbol are muxed and may not be available without configuration.
Table 27. JTAG and Debug Interface Signals
Default Buffer State
Signal Name
Dir
Term
Plat.
Power
S4/S5
S3
Reset
Enter S0
Notes
TAP_TCK
I
2k(L)
V1P8A
Pull-down
Pull-down
Pull-down
Pull-down
TAP_TDI
I
2k(H)
V1P8A
Pull-up
Pull-up
Pull-up
Pull-up
TAP_TDO
O
-
V1P8A
Pull-up
Pull-up
Pull-up
Pull-up
TAP_TMS
I
2k(H)
V1P8A
Pull-up
Pull-up
Pull-up
Pull-up
TAP_TRST#
I
2k(H)
V1P8A
Pull-up
Pull-up
Pull-up
Pull-up
TAP_PRDY#
O
2k(H)
V1P8A
Pull-up
Pull-up
Pull-up
Pull-up
TAP_PREQ#
I
2k(H)
V1P8A
Pull-up
Pull-up
Pull-up
Pull-up
Table 28. Miscellaneous Signals and Clocks (Sheet 1 of 2)
Default Buffer State
Signal Name
Dir
Term
Plat.
Power
S4/S5
S3
Reset
Enter S0
SVID_DATA
I/O
2k(H)
V1P0S
Off
Off
Pull-up
Pull-up
SVID_CLK
O
2k(H)
V1P0S
Off
Off
Pull-up
Pull-up
SVID_ALERT#
I
2k(H)
V1P0S
Off
Off
Pull-up
Pull-up
PROCHOT#
I/O
2k(H)
V1P0S
Off
Off
Pull-up
Pull-up
ILB_8254_SPKR†
O
20k(H)
V1P8S
Off
Off
Pull-up
Pull-up
ILB_NMI†
I
20k(H)
V1P8S
Off
Off
Pull-up
Pull-up
Table 26. PCU - Power Management Controller (PMC) Interface Signals (Sheet 2 of 2)
Default Buffer State
Signal Name
Dir
Term
Plat.
Power
S4/S5
S3
Reset
Enter S0
Notes