Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
581
Default: 00000000h
14.10.139 MIPIC_CMD_ADD—Offset B910h
mipiC command add
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
DA
TA
_LENGTH
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:20
0b
RW
RESERVED: 
Reserved.
19:0
0b
RW
DATA_LENGTH: 
This field shows the remaining length of data that needs to be read 
from memory, Initially set by S/W and is decremented by H/W as reads are issued
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
GTTMMADR_LSB Type: 
PCI Configuration Register (Size: 32 
bits)
GTTMMADR_LSB Reference: 
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CO
MM
A
N
D_M
E
M_ADDR
RE
SERV
ED
MIP
IC_AUT
O
_PWG
_E
N
A
BLE
COMMAND_DA
TA_M
O
DE
COMMAND_V
ALID
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:5
0b
RW
COMMAND_MEM_ADDR: 
When there are new commands that need to be sent to the 
display panel, S/W programs this register with the memory address to read the 
commands from
4:3
0b
RW
RESERVED: 
MBZ
2
0b
RW
MIPIC_AUTO_PWG_ENABLE: 
Idle state: SW driver writes to this bit to enable auto 
power gating for MIPIC controller 
0: default 
1: auto power gate is enabled