Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
582
Datasheet
14.10.140 MIPIC_CMD_LEN—Offset B914h
mipiC commanf Length
Access Method
Default: 00000000h
14.10.141 MIPIC_RD_DATA_RETURN0—Offset B918h
mipi C Read data return 0
Access Method
Default: 00000000h
1
0b
RW
COMMAND_DATA_MODE:
0: data for memory write command from system buffer
that is specified by MIPI data address register
1: data for memory write command from pipe A rendering
0
0b
RW
COMMAND_VALID:
This bit is set by S/W when the mem_addr is written and is
cleared by H/W when done reading the data from memory
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
COMMAND_3
COMMAND_2
COMMAND_1
COMMAND_0
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
0b
RW
COMMAND_3:
This is command 3 length (command + parameters) in bytes
23:16
0b
RW
COMMAND_2:
This is command 2 length (command + parameters) in bytes
15:8
0b
RW
COMMAND_1:
This is command 1 length (command + parameters) in bytes
7:0
0b
RW
COMMAND_0:
This is command 0 length (command + parameters) in bytes
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h