Intel E3815 FH8065301567411 Data Sheet

Intel

Product codes

FH8065301567411

Intel

®

Atom™ Processor E3800 Product Family

638

Datasheet

62F80–62F83h

4

“AUD_CNTL_ST_D_DBG—Offset 62F80h” on page 771

00000000h

62F84–62F87h

4

“AUD_HDMIW_INFOFR_D_DBG—Offset 62F84h” on page 772

00000000h

62F88–62F8Bh

4

“AUD_CONFIG_DEFAULT2_REG_PORTB—Offset 62F88h” on page 773

00000000h

62F8C–62F8Fh

4

“AUD_CONFIG_DEFAULT2_REG_PORTC—Offset 62F8Ch” on page 773

00000000h

62F90–62F93h

4

“AUD_CONFIG_DEFAULT2_REG_PORTD—Offset 62F90h” on page 774

00000000h

62F94–62F97h

4

“AUD_MCTSA—Offset 62F94h” on page 774

00000000h

62F98–62F9Bh

4

“AUD_MCTSB—Offset 62F98h” on page 775

00000000h

64100–64103h

4

“DP_B—Offset 64100h” on page 776

00000018h

64110–64113h

4

“DPB_AUX_CH_CTL—Offset 64110h” on page 779

00050000h

64114–64117h

4

“DPB_AUX_CH_DATA1—Offset 64114h” on page 780

00000000h

64118–6411Bh

4

“DPB_AUX_CH_DATA2—Offset 64118h” on page 781

00000000h

6411C–6411Fh

4

“DPB_AUX_CH_DATA3—Offset 6411Ch” on page 781

00000000h

64120–64123h

4

“DPB_AUX_CH_DATA4—Offset 64120h” on page 782

00000000h

64124–64127h

4

“DPB_AUX_CH_DATA5—Offset 64124h” on page 783

00000000h

64130–64133h

4

“DP_AUX_CH_AKSV_HI—Offset 64130h” on page 783

00000000h

64134–64137h

4

“DP_AUX_CH_AKSV_LO—Offset 64134h” on page 784

00000000h

64150–64153h

4

“DPB_AUX_TST—Offset 64150h” on page 784

00000000h

64200–64203h

4

“DP_C—Offset 64200h” on page 787

00000018h

64210–64213h

4

“DPC_AUX_CH_CTL—Offset 64210h” on page 789

00050000h

64214–64217h

4

“DPC_AUX_CH_DATA1—Offset 64214h” on page 790

00000000h

64218–6421Bh

4

“DPC_AUX_CH_DATA2—Offset 64218h” on page 791

00000000h

6421C–6421Fh

4

“DPC_AUX_CH_DATA3—Offset 6421Ch” on page 792

00000000h

64220–64223h

4

“DPC_AUX_CH_DATA4—Offset 64220h” on page 792

00000000h

64224–64227h

4

“DPC_AUX_CH_DATA5—Offset 64224h” on page 793

00000000h

64228–6422Bh

4

“DPC_AUX_TST—Offset 64228h” on page 793

00000000h

65000–65003h

4

“STREAM_A_LPE_AUD_CONFIG—Offset 65000h” on page 795

00000280h

65008–6500Bh

4

“STREAM_A_LPE_AUD_CH_STATUS_0—Offset 65008h” on page 797

00000000h

6500C–6500Fh

4

“STREAM_A_LPE_AUD_CH_STATUS_1—Offset 6500Ch” on page 798

00000000h

65010–65013h

4

“STREAM_A_LPE_AUD_HDMI_CTS_DP_MAUD—Offset 65010h” on page 799

00000000h

65014–65017h

4

“STREAM_A_LPE_AUD_HDMI_N_DP_NAUD—Offset 65014h” on page 799

00000000h

65020–65023h

4

“STREAM_A_LPE_AUD_BUFFER_CONFIG—Offset 65020h” on page 800

00000100h

65024–65027h

4

“STREAM_A_LPE_AUD_BUF_CH_SWP—Offset 65024h” on page 801

00FAC688h

65040–65043h

4

“STREAM_A_LPE_AUD_BUF_A_ADDR—Offset 65040h” on page 802

00000000h

65044–65047h

4

“STREAM_A_LPE_AUD_BUF_A_LENGTH—Offset 65044h” on page 803

00000000h

65048–6504Bh

4

“STREAM_A_LPE_AUD_BUF_B_ADDR—Offset 65048h” on page 803

00000000h

6504C–6504Fh

4

“STREAM_A_LPE_AUD_BUF_B_LENGTH—Offset 6504Ch” on page 804

00000000h

65050–65053h

4

“STREAM_A_LPE_AUD_BUF_C_ADDR—Offset 65050h” on page 805

00000000h

65054–65057h

4

“STREAM_A_LPE_AUD_BUF_C_LENGTH—Offset 65054h” on page 805

00000000h

65058–6505Bh

4

“STREAM_A_LPE_AUD_BUF_D_ADDR—Offset 65058h” on page 806

00000000h

Table 171.

Summary of Display Memory Mapped I/O Registers—GTTMMADR_LSB

Offset

Size

(Bytes)

Register Name (Register Symbol)

Default

Value