Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

666

Datasheet

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[DevCTG] This will enable the 

consideration of the hot plug interrupt status bit in the Port Hotplug Status register, 

offset 61114h. This bit enables detection on the SDVOC interrupt input pin pair.  

0 = SDVOC Hot Plug Detect Disabled (Default) 

1 = SDVOC Hot Plug Detect Enabled

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[DevCDV, DevCL, DevCTG, 

DevVLVP ] This bit enables consideration of the pipe A audio interrupt status bit in the 

Port Hotplug Status Register, offset 61114h. It relates to the HDMI port that has audio 

enabled and can only be used in combination with TMDS encoding. This bit is only to be 

used for integrated HDMI. 

0 = Audio interrupt detect disabled (Default) 

1 = Audio interrupt detect enabled

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[DevVLVP ] This bit enables 

consideration of the pipe B audio interrupt status bit in the Port Hotplug Status Register, 

offset 61114h. It relates to the HDMI port that has audio enabled and can only be used 

in combination with TMDS encoding. This bit is only to be used for integrated HDMI. 

0 = Audio interrupt detect disabled (Default) 

1 = Audio interrupt detect enabled

22:19

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mbz

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[DevVLVP] MBZ 

TV Hot Plug Detect Interrupt Enable: [DevCL, DevCTG] This will enable the 

consideration of the TV hot plug interrupt status bit. 

0 = TV Hot Plug Detect Disabled (bit 10 of the port hotplug status register no longer 

detects interrupts, Default) 

1 = TV Hot Plug Detect Enabled

17:16

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[DevCDV, DevCTG, DevELK] These bits 

define the duration of the pulse defined as a short pulse for DisplayPort ports. 

Pulse less than this value is detected short pulse. Pulse larger than this value is detected 

long pulse. For DP, this shall use 2ms as threshold. 

 

00 = 2mS (Default) 

01 = 4.5mS 

10 = 6mS 

11 = 100mS

15:10

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mbz

9

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[DevVLVP] MBZ. This bit is the same as bit 23 in 61100h 

[DevCDV, DevCTG, DevBW, DevCL, DevBLC] CRT Hot plug Interrupt Enable: Hotplug 

detection is used to cause an interrupt or status bit based on the connection or 

disconnection of a CRT to the analog video connection.  

0 = No hot plug interrupt is enabled (Default) 

1 = Hot plug detection is enabled

8

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[DevVLVP] MBZ. This bit is the same as bit 22 in 61100h  

[DevCDV, DevCTG] CRT Hot plug Circuit Activation Period: This bit sets the activation 

period for the CRT hot plug circuit detection. Setting this bit to 1 is required for the 

correct operation of CRT DAC detection.  

0 = 32 cdclk periods (Default) 

1 = 64 cdclk periods 

7

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[DevVLVP] MBZ. This bit is the same as bit 21 in 61100h 

[DevCDV, DevCTG, DevBW, DevCL, DevBLC] CRT DAC on time Value: Powerup time for  

0 = CRT DAC requires 2M cdclks for warmup (Default) 

1 = CRT DAC requires 4M cdclks for warmup