Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
675
Default: 00000000h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
S
D
VO
_DC_B
A
LANC
E_RE
SET
RE
SE
RVED
PO
R
TC_AUX
_
LE
AK
A
G
E
_
ENA
B
LE
PO
R
T
B
_
AUX
_
LE
AK
A
G
E
_
ENA
B
LE
SC
R
A
MBLED_1S_ON_P
IPE
_
B
SC
RAM
B
LED_1S_ON_
PIPE_A
IDLE_TIME_SPEEDUP_ON_P
IPE_
B
IDLE_TIME_SPEEDUP
_
ON_
PIPE_A
TEST
_P
A
TTERN_8_BIT_PROGRA
MMED
_
INPUT_ON_TRANSCODE
_
B
T
E
ST_P
A
TT
E
RN_8_BIT_PROGRAMMED_INPUT_ON_TRANSC
O
DE_A
SCRAMBLE
D_0S_ON_TRANSCODE
_
B
SC
RAMBLED
_
0S
_ON_TRANS
C
O
D
E_A
PRBS7
_
T
E
ST
_P
A
TTERN_ON_TRANSCODE
_
B
PRBS7_TE
S
T_P
A
TT
ERN_ON_TRANSC
O
DE_A
SCRAMBLE
R_RESE
T_ONCE_A
_
FR
A
ME_ON_TRA
N
SCODE
_
B
SCRAMBLE
R_
R
E
SE
T_ONCE_A_FRA
M
E
_ON_TRANS
C
O
D
E_A
Bit
Range
Default &
Access
Field Name (ID): Description
31
0b
RW
SDVO_DC_BALANCE_RESET:
Project: All Format:
Value Name Description Project
0b Not Reset DC Balance circuitry will not be reset on every frame All
1b Reset DC Balance circuitry will be reset on every frame All
30:14
0b
RW
RESERVED:
Project: All Format: MBZ
13
0b
RW
PORTC_AUX_LEAKAGE_ENABLE:
Project: All Format:
12
0b
RW
PORTB_AUX_LEAKAGE_ENABLE:
Project: All Format:
11
0b
RW
SCRAMBLED_1S_ON_PIPE_B:
Project: All Format:
Value Name Description Project
0b Disable Disable scrambled 1s All
1b Enable Enable scrambled 1s All
10
0b
RW
SCRAMBLED_1S_ON_PIPE_A:
Project: All Format:
Value Name Description Project
0b Disable Disable scrambled 1s All
1b Enable Enable scrambled 1s All