Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
726
Datasheet
14.11.69 AUD_CTS_ENABLE_A—Offset 62028h
Audio CTS Programming Enable Pipe A 
Access Method
Default: 00000000h
14.11.70 AUD_PWRST—Offset 6204Ch
Audio Power State (Function Group, Convertor, Pin Widget) 
7:0
0b
RO
STEPPING_ID: 
Project: All  
An optional vendor stepping number within the given Revision ID. This field is hardwired 
within the device. Value = 0x0 
Bit 
Range
Default & 
Access
Field Name (ID): Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
GTTMMADR_LSB Type: 
PCI Configuration Register (Size: 32 
bits)
GTTMMADR_LSB Reference: 
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RES
E
RVE
D
CT
S_
M
_
V
A
LU
E_
IN
DE
X
ENABLE
_C
T
S
_OR_M_P
R
OG
RAMM
ING
C
T
S_P
R
OG
R
A
MM
ING
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:22
0b
RW
RESERVED: 
Project: All Format: 
21
0b
RW
CTS_M_VALUE_INDEX: 
Project: All  
Default Value: 0b  
Value Name Description Project  
0b CTS CTS value read on bits 23:4 reflects CTS value. Bit 23:4 is programmable to any 
CTS value. default is 0 All  
1b M M value read on bits 21:4 reflects DP M value. Set this bit to 1 before programming 
M value register. When this is set to 1 23:4 will reflect the current N value All 
20
0b
RW
ENABLE_CTS_OR_M_PROGRAMMING: 
Project: All  
When set will enable CTS or M programming. 
19:0
0b
RW
CTS_PROGRAMMING: 
Project: All  
These are bits [19:0] of programmable CTS values for non-CEA modes. Bit 21 of this 
register must also be written in order to enable programming. Please note that the Pipe 
to which audio is attached must be disabled when changing this field.