Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

741

Audio HDMI Status 

Default: 00000000h

1

0b

RW

Project: All  

Default Value: 0b  

See CP_ReadyD description.  

Value Name Description Project  

0b Not Ready CP request pending or not ready to receive requests All  

1b Ready CP request ready All 

0

0b

RW

Project: All  

Default Value: 0b  

See ELD_validD descripion.  

Value Name Description Project  

0b Invalid ELD data invalid (default, when writing ELD data, set 0 by software) All  

1b Valid ELD data valid (Set by video software only) All 

Memory Mapped I/O Register

(Size: 32 bits)

PCI Configuration Register (Size: 32 

bits)
GTTMMADR_LSB Reference: 

[B:0, D:2, F:0] + 10h

31

28

24

20

16

12

8

4

0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CONV_B_CDCLK_DO

TCLK_FIFO_UNDERRUN

CONV_B_CDCLK_DO

TCLK_FIFO_OVERRUN

C

O

NV_A_CDCLK_DO

TCLK_FIFO_UNDERRUN

C

O

NV_A_CDCLK_DO

TCLK_FIFO_OVERRUN

RES

E

RVE

D

BCLK_CDCLK_FIFO_O

V

ERRUN

FUNC

T

IO

N

_RESE

T

RE

SERV

ED_1

31

0b

RW

Project: All  

This bit indicates an underrun in the FIFO inside the clock crossing logic between CDCLK 

and DOTCLK. Clearing this status bit is accomplished by writing a 1 to this bit through 

MMIO. 

30

0b

RW

Project: All  

This bit indicates an overrun in the FIFO inside the clock crossing logic between CDCLK 

and DOTCLK. Clearing this status bit is accomplished by writing a 1 to this bit through 

MMIO.