Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
781
14.11.118 DPB_AUX_CH_DATA2—Offset 64118h
Display Port B AUX Data Register 2 [DevCTG, DevCDV] AuxB Data2 (dprrega_b0.v
auxb_dpr_data2, ql_auxb_d2)
Access Method
Default: 00000000h
14.11.119 DPB_AUX_CH_DATA3—Offset 6411Ch
Display Port B AUX Data Register 3 [DevCTG, DevCDV] AuxB Data3 (dprrega_b0.v
auxb_dpr_data3, ql_auxb_d3)
Access Method
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AUX_CH_DA
TA1_31
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0b
RW
AUX_CH_DATA1_31:
0]:
The first Dword of the message. The Msbyte is transmitted first. Reads will give the
response data after transaction complete.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AU
X_CH_DA
TA2_31
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0b
RW
AUX_CH_DATA2_31:
0]:
The second Dword of the message. The Msbyte is transmitted first. Only used if the
message size is greater than 4. Reads will give the response data after transaction
complete.