Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
795
14.11.133 STREAM_A_LPE_AUD_CONFIG—Offset 65000h
LPE Audio Configuration
Access Method
Default: 00000280h
13
0b
RW
DPC_AUX_TIGHTEN_FREQUENCY_WINDOW: 
Project: All  
See DPB description. 
12
0b
RW
DPC_AUX_LESS_GOOD_SYNC_0S_REQUIRED: 
Project: All  
See DPB description. 
11:10
0b
RW
DPC_AUX_DEGLITCH_AMOUNT: 
Project: All  
Default Value: 0b  
See DPB description.  
Value Name Description Project  
00b 50 ns 25 clocks - GMBUS type - 50ns at 500MHz cdclk All  
01b 125 ns 1/4 2X bit clock divider value - 125ns All  
10b 62.5 ns 1/8 2X bit clock divider value - 62.5ns All  
11b 31.125 ns 1/16 2X bit clock divider value - 31.125ns All 
9
0b
RW
RESERVED_1: 
Project: All Format: 
8
0b
RW
DPC_AUX_MULTIPLE_RECEIVED_EDGES_ERROR_ENABLE: 
Project: All  
Default Value: 0b  
Value Name Description Project  
0b Okay Multiple edges in window is okay All  
1b Error Multiple edges in window is an error All 
7:6
0b
RW
DPC_AUX_DEBUG_STATUS_READBACK: 
Project: All  
Default Value: 0b  
Value Name Description Project  
00b Program Readback of bit clock divide field gives the programmed clock frequency All  
01b Recover Readback of bit clock divide field gives the recovered clock frequency All  
10b Error Type Readback of bit clock divide field gives the error type All 
5:0
0b
RW
RESERVED_2: 
Project: All Format: 
Bit 
Range
Default & 
Access
Field Name (ID): Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
GTTMMADR_LSB Type: 
PCI Configuration Register (Size: 32 
bits)
GTTMMADR_LSB Reference: 
[B:0, D:2, F:0] + 10h