Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
799
14.11.136 STREAM_A_LPE_AUD_HDMI_CTS_DP_MAUD—Offset 65010h
Audio HDMI CTS Register (DP Maud)
Access Method
Default: 00000000h
14.11.137 STREAM_A_LPE_AUD_HDMI_N_DP_NAUD—Offset 65014h
Audio HDMI N Register (DP Naud)
Access Method
Default: 00000000h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RES
E
RVE
D
ENABL
E
_CT
S
_M_
PROG
R
AMM
ING
HDMI
_CT
S
_V
ALUE
S
Bit
Range
Default &
Access
Field Name (ID): Description
31:25
0b
RW
RESERVED:
Reserved.
24
0b
RW
ENABLE_CTS_M_PROGRAMMING:
1 = Enable CTS/M programming
0 = Disable CTS/M programming
23:0
0b
RW
HDMI_CTS_VALUES:
These are bits [23:0] of programmable HDMI CTS values (or DP
Maud) that is pre-calculated to achieve desired audio sample rates with a particular
pixel clocks configuration.
Audio function must be disabled when changing this field. Bit 24 also need to write to 1
to enable this field.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h