Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
853
Default: 00000000h
14.11.184 PIPEAMSAMISC—Offset 70048h
Pipe A MSA MISC
Access Method
Default: 00000000h
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
GTTMMADR_LSB Type: 
PCI Configuration Register (Size: 32 
bits)
GTTMMADR_LSB Reference: 
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PIPE
_A_
FL
IP
_
CO
UNTE
R
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:0
0b
RO
PIPE_A_FLIP_COUNTER: 
Provides read back of the display pipe flip counter. This 
counter increments on each flip of the surface of the primary plane on this pipe. This 
includes command streamer asynchronous and synchronous flips and any MMIO writes 
to the primary plane surface address. It rolls over back to 0 after 2^32 flips
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
GTTMMADR_LSB Type: 
PCI Configuration Register (Size: 32 
bits)
GTTMMADR_LSB Reference: 
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
HARD
W
A
RE_DRIVE
_MSA_MISC1_ENAB
LE
RES
E
RV
ED
MSA_MISC
1_FIEL
D
_S3D