Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

854

Datasheet

Display FIFO Drain Latency 1

Default: 00000000h

31

0b

RW

This bit enables hardware to drive MSA 

MISC1 bit3:1 with the stero 3D left/right eye field indication. Hardware will drive 000 

when S3D mode is disabled, 001 when enabled and the upcoming video frame is right 

eye, 011 when enabled and the upcoming video frame is left eye. 

When this bit is disabled, software may manually program the MSA MISC1 Field S3D 

field in bit 2:0 in this register to set MISC1 bit 3:1 

0 = Disable hardware driving MSA MISC1 bit 3:1. Allow software to manually program 

MSA MISC1 bit3:1 through MSA_MISC1_FIELD_S3D (default) 

1 = Enable hardware to drive MSA MISC1 bit3:1 for S3D

30:3

0b

RW

Reserved.

2:0

0b

RW

This field provides software to manually program MSC1 

stero video attribute for DisplayPort: 

000 = No stereo video transported 

001 = For progressive video, the next (upcoming) video frame is RIGHT eye 

010 = Reserved 

011 = For progressive video, the next (upcoming) video frame is LEFT eye 

100 = Stacked top and bottom top half represents left-eye view and bottom half 

represents right-eye view 

101 = Stacked top and bottom top half represents right-eye view and bottom half 

represents left-eye view

Memory Mapped I/O Register

(Size: 32 bits)

PCI Configuration Register (Size: 32 

bits)
GTTMMADR_LSB Reference: 

[B:0, D:2, F:0] + 10h