Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
866
Datasheet
14.11.194 CURACNTR—Offset 70080h
Cursor A Control Register
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 1
DISP
LA
Y
_
SPRITE_D_FIFO_W
A
T
E
RMARK
1
DISP
LA
Y
_
SPRITE_D_FIFO_W
A
T
E
RMARK
DISP
LA
Y_SP
RITE
_C_FIFO
_
W
A
T
E
RMARK
1
DISP
LA
Y_SP
RITE
_C_FIFO
_
W
A
T
E
RMARK
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
00000100b
RW
DISPLAY_SPRITE_D_FIFO_WATERMARK1:
[DevVLVP] Number in 64Bs of space in
FIFO above which the Display Sprite D Stream will generate request with status 2
23:16
00001111b
RW
DISPLAY_SPRITE_D_FIFO_WATERMARK:
[DevVLVP] Number in 64Bs of space in
FIFO above which the Display Sprite D Stream will generate request with status 2
15:8
00000100b
RW
DISPLAY_SPRITE_C_FIFO_WATERMARK1:
DevVLVP] Number in 64Bs of space in
FIFO above which the Display Sprite C Stream will generate request with status 2
7:0
00001111b
RW
DISPLAY_SPRITE_C_FIFO_WATERMARK:
DevVLVP] Number in 64Bs of space in
FIFO above which the Display Sprite C Stream will generate request with status 2
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
PI
PE
_
S
EL
E
C
T
P
O
PU
P_CU
RSO
R
_E
NABLE
D
CURSOR_GAMMA_E
NABLE
RESE
RVED
_1
_180RO
TA
T
ION
RESE
RVED
_2
CURS
O
R
_
M
OD
E
_
S
E
LE
CT_BIT
RESE
RVED
_3
RESE
RVED
_4
C
U
R
S
OR
_M
OD
E
_
SE
LE
C
T