Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

9

33.2 Features .......................................................................................................4430
33.3 Use ..............................................................................................................4438
33.4 References ....................................................................................................4438
33.5 Register Map .................................................................................................4438
33.6 PCU SMBUS PCI Configuration Registers............................................................4440
33.7 PCU SMBUS Memory Mapped I/O Registers........................................................4454
33.8 PCU SMBUS I/O Registers................................................................................4466

 Legacy Block (iLB) Overview............................................................4478

34.1 Signal Descriptions .........................................................................................4478
34.2 Features .......................................................................................................4479
34.3 PCU iLB Interrupt Decode and Route .................................................................4481

PCU – iLB – Low Pin Count (LPC) Bridge ...............................................................4515
35.1 Signal Descriptions .........................................................................................4515
35.2 Features .......................................................................................................4516
35.3 Use ..............................................................................................................4521
35.4 References ....................................................................................................4523
35.5 Register Map .................................................................................................4523
35.6 PCU iLB Low Pin Count (LPC) Bridge PCI Configuration Registers...........................4525
35.7 PCU iLB LPC BIOS Control Memory Mapped I/O Registers ....................................4542

PCU – iLB – Real Time Clock (RTC) .......................................................................4543
36.1 Signal Descriptions .........................................................................................4543
36.2 Features .......................................................................................................4544
36.3 Interrupts .....................................................................................................4545
36.4 References ....................................................................................................4547
36.5 Register Map .................................................................................................4547
36.6 IO Mapped Registers.......................................................................................4547
36.7 Indexed Registers ..........................................................................................4547
36.8 PCU iLB Real Time Clock (RTC) I/O Registers .....................................................4549

PCU – iLB – 8254 Timers.......................................................................................4551
37.1 Signal Descriptions .........................................................................................4551
37.2 Features .......................................................................................................4552
37.3 Use ..............................................................................................................4552
37.4 Register Map .................................................................................................4555
37.5 IO Mapped Registers.......................................................................................4555
37.6 PCU iLB 8254 Timers IO Registers ....................................................................4556

PCU – iLB – High Precision Event Timer (HPET) ....................................................4561
38.1 Features .......................................................................................................4561
38.2 References ....................................................................................................4563
38.3 Register Map .................................................................................................4563
38.4 Memory Mapped Registers...............................................................................4563
38.5 PCU iLB High Performance Event Timer (HPET) Memory Mapped IO Registers .........4564

PCU – iLB – GPIO..................................................................................................4572
39.1 Signal Descriptions .........................................................................................4572
39.2 Features .......................................................................................................4572
39.3 Legacy Use....................................................................................................4573
39.4 Memory Mapped Use ......................................................................................4573
39.5 Register Map .................................................................................................4574
39.6 GPIO Registers ..............................................................................................4575