Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

935

30

0b

RW

When this bit is set to a one, the 

VGA and pop-up data is scaled using pixel doubling in both the horizontal and vertical 

direction for use on un-scaled flat panel displays. Setting this bit allows the VGA to run 

at higher dot clock frequencies and creates a larger (4x the size) image for better 

quality on larger displays. It is intended for use in one of the centering modes when not 

using the internal panel fitting. Do not use it for native VGA modes or when internal 

panel fitting is used to scale VGA.  

In the situations where it is used, for 1280 wide or larger panels this bit should be set. 

For exactly 1280 wide panels, the Nine-dot disable bit should also be set. This operation 

is in addition to the VGA functions that double the pixels and lines. 

0 = VGA display is normal size 

1 = VGA and VGA popup data is doubled in the horizontal and vertical direction.

29

0b

RW

This bit only applies to devices with dual pipe support. For devices 

with a single display pipe, this bit will be ignored. For dual pipe devices, this bit 

determines which pipe is to receive the VGA display data. This must be changed only 

when the VGA display is in the disabled state via the VGA display disable bit or during 

the write to enable VGA display. 

0 = Selects Assigns the VGA display to Pipe A  

1 = Selects Assigns the VGA display to Pipe B

28:27

0b

RW

Software must preserve the contents of these bits.

26

0b

RW

This bit determines if the VGA border areas during VGA 

centering modes are included in the active display area and do or do not appear on 

integrated TV encoder output and devices that use centering such as on DVO connected 

flat panel, TV displays, or integrated panels.  

For use with the internal panel fitting logic, the border if enabled will be scaled along 

with the pixel data. Setting this bit allows the popup to be positioned overlapping the 

border area of the image. 

0 = VGA Border areas are not included in the image size calculations for centering only 

active area. 

1 = VGA Border areas are enabled and is passed to the display pipe for display and used 

in the image size calculation for centering modes

25:24

0b

RW

VGA centering modes use the pipe timing generators to 

determine the actual display timings. This would normally correspond to the display 

panel size and timings. The VGA registers determine the centered VGA image height 

and width. The VGA border may or may not be considered in the calculation selected by 

the VGA Border Enable bit. For a proper image, the VGA image size should not exceed 

the pipe timing generator active rectangle. When using the internal panel fitting logic, 

the horizontal image size needs to be less than or equal to 2048 pixels to generate a 

proper image. The VGA image will either be centered within the pipe timing rectangle or 

appear in the upper left corner.  

Upper left corner centered mode is generally used for external panel scaling where the 

DVO stall signal is used and is always used for internal panel fitting operation. When 

panel fitter is enabled on the same pipe as VGA this register setting is ignored and upper 

left corner centered mode is always selected. When centering is disabled, the VGA CRTC 

registers determine the display timing compatible with legacy VGA devices for driving 

CRT like devices. 

00 = VGA centering is disabled, VGA operates in Native VGA mode or when driving 

integrated TV 

01 = VGA centering is enabled, VGA image appears in the center of the larger rectangle 

10 = VGA centering is enabled, VGA image appears in the upper left corner of the larger 

rectangle 

11 = VGA centering is enabled, VGA image appears in the upper left corner of the larger 

rectangle

23

0b

RW

This bit only applies to dual display pipe devices and 

determines which palette VGA palette read accesses will occur from.  

0 = VGA palette reads will access Palette A (default).  

1 = VGA palette reads will access Palette B 

VGA palette reads are reads from I/O address 0x3c9.