Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
949
14.11.281 SPASIZE—Offset 72190h
Sprite A Height and Width Register
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
SP
RITEY
_
PO
SITIO
N
RESE
RVED
_1
SPRITE
_X_P
OSITION
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:28
0b
RW
RESERVED: 
Write as zero
27:16
0b
RW
SPRITEY_POSITION: 
These 12 bits specify the vertical position in lines of the sprite 
(upper left corner) relative to the beginning of the active video area. When performing 
180 rotation, this field specifies the vertical position of the lower right corner relative to 
the end of the active video area in the unrotated orientation. The defined sprite 
rectangle must always be completely contained within the displayable area of the screen 
image.
15:12
0b
RW
RESERVED_1: 
Write as zero
11:0
0b
RW
SPRITE_X_POSITION: 
These 12 bits specify the horizontal position in pixels of the 
sprite (upper left corner) relative the beginning of the active video area. When 
performing 180 rotation, this field specifies the horizontal position of the original lower 
right corner relative to the original end of the active video area in the unrotated 
orientation. The defined sprite rectangle must always be completely contained within 
the displayable area of the screen image.
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
GTTMMADR_LSB Type: 
PCI Configuration Register (Size: 32 
bits)
GTTMMADR_LSB Reference: 
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RESE
RVE
D
SP
RITE_H
EIG
H
T
RES
E
RVE
D
_1
SPRITE_WID
TH
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:28
0b
RW
RESERVED: 
Write as zero