Texas Instruments TMS320DM644x User Manual
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4.9
MMC Number of Blocks Register (MMCNBLK)
4.10 MMC Number of Blocks Counter Register (MMCNBLC)
Registers
The MMC number of blocks register (MMCNBLK) specifies the number of blocks for a multiple-block
transfer.
transfer.
The MMC number of blocks register (MMCNBLK) is shown in
and described in
.
Figure 26. MMC Number of Blocks Register (MMCNBLK)
31
16
Reserved
R-0
15
0
NBLK
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 14. MMC Number of Blocks Register (MMCNBLK) Field Descriptions
Bit
Field
Value
Description
31-16
Reserved
0
Reserved
15-0
NBLK
0-FFFFh
Number of blocks. This field is used to set the total number of blocks to be transferred.
0
Infinite number of blocks. The MMC controller reads/writes blocks of data until a
STOP_TRANSMISSION command is written to the MMC command register (MMCCMD).
STOP_TRANSMISSION command is written to the MMC command register (MMCCMD).
1h–FFFFh
n blocks. The MMC controller reads/writes only n blocks of data, even if the
STOP_TRANSMISSION command has not been written to the MMC command register
(MMCCMD).
STOP_TRANSMISSION command has not been written to the MMC command register
(MMCCMD).
The MMC number of blocks counter register (MMCNBLC) is a down-counter for tracking the number of
blocks remaining to be transferred during a multiple-block transfer.
blocks remaining to be transferred during a multiple-block transfer.
The MMC number of blocks counter register (MMCNBLC) is shown in
and described in
.
Figure 27. MMC Number of Blocks Counter Register (MMCNBLC)
31
16
Reserved
R-0
15
0
NBLC
R-FFFFh
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 15. MMC Number of Blocks Counter Register (MMCNBLC) Field Descriptions
Bit
Field
Value
Description
31-16
Reserved
0
Reserved
15-0
NBLC
0–FFFFh
Read this field to determine the number of blocks remaining to be transferred.
Multimedia Card (MMC)/Secure Digital (SD) Card Controller
50
SPRUE30B – September 2006