Intel IQ80321 User Manual
Board Manual
53
Intel
®
IQ80321 I/O Processor Evaluation Platform
Hardware Reference Section
3.10.2
PCIX Initialization Summary
shows a routing guidance on how PCI-X mode is determined/implemented on the
secondary side of the PCI-X bridge. The Intel
®
80321 I/O processor (80321), GbE device, and the
PCI-X expansion slot all reside on this bus.
3.10.2.1
User Defined Switches
User can set the PCIXCAP signal to force one of the following modes:
The IQ80321 platform is by default set to operate this bus in PCI-X 66 MHz mode. The loading on
the secondary PCI-X bus may result in marginal operation when speed is greater than that.
the secondary PCI-X bus may result in marginal operation when speed is greater than that.
When an expansion card is placed on the PCI-X expansion slot, the mode is based on the least
capable device on the bus. For example, when the bus is forced to be PCI-X 66 capable and then
places a PCI 66 card in the expansion slot, then the bus is configured as PCI 66.
capable device on the bus. For example, when the bus is forced to be PCI-X 66 capable and then
places a PCI 66 card in the expansion slot, then the bus is configured as PCI 66.
Important:
The clock selection is manually configured. Pay close attention to setting this up correctly.
Important:
All settings must be done prior to power-up/reset.
3.10.2.2
PCI-X Bridge Initialization Signals
The On-board PCI-X bridge samples the PCIXCAP, SEL100, and M66EN signals to drive/indicate the
correct mode to the secondary bus devices. The 80321 uses these signals to set its internal PLs,
providing correct frequency to the Intel
correct mode to the secondary bus devices. The 80321 uses these signals to set its internal PLs,
providing correct frequency to the Intel
®
XScale™ core, as well as internal, peripheral, and DDR buses.
Figure 16.
PCI-X Routing Diagram on Secondary PCI-X Bridge
Sw itch
Clock
Multiplier/Buffer
PCI-X
Bridge
PCIXCAP
M66EN
Se le ction
Enable
PCI-X Clock
33 M
H
z
66 M
H
z
100 M
H
z
133 M
H
z
SPCI-X Slot
82544
Gigabit Ethe rne t
Se l 100
In
itia
liz
a
tio
n
Si
gnal
s
PCIXCAP
M66EN Signal
S_DEV SEL
S_FRA ME
S_IRDY
S_STOP
S_TRDY
S_FRA ME
S_IRDY
S_STOP
S_TRDY
Sw itch
Inte l®
80321 I/O
Proce ssor
S7E1-6
S7E1-7
S7E1-8
Sw itch
S8E2-1
S8E2-2
Sw itch
S8E1-4
Sw itch
S8E2-4
OSC
•
PCI-X 100/133
•
PCI-X 66
•
PCI