SBE HighWire HW400c/2 User Manual

HighWire HW400c/2 User Reference Guide Rev 1.0

If a PCI-X 133 card is installed

in Site B, it may be forced to 100 MHz, by installing the LPCI jumper at

(see Section 3.1.5).

st PCI bus, that is, the two

uses can operate at different speeds and bus widths.

from being installed by a voltage key residing at each site (see Section

.10.3).

3.2.5 Serial EEPROM

uch

the CPLD. See

ections 4.2.25 to 4.2.28 for details on accessing the EEPROM.

ddress. U-boot use the remaining addresses (0x30-0xFF) for boot parameters.

t 0 registers. In Table 9, the MAC address is represented by the sample

number 00:A0:D6:12:34:56.

Module presence is detected by the state of the BUSMODE1 pin. Interrupts from
either of the two sites are fed through the MV64462 GPIO pins, and can be routed t
either the on-board processor or through the host PCI bus to the CompactPCI host
processor. The local PCI bus is independent of the ho
b

The local PCI Bus I/O voltage is connected to 3.3 volts only. Therefore, PTMC
modules with 5-volt only I/O signals cannot be used on the HW400c/2, and are
prevented

The HW400c/2 includes a 4 K-bit non-volatile EEPROM for storing small items s
as IP addresses and board serial numbers. This device is the Atmel AT93C66A,
which is organized in a 256 x 16-bit format. The EEPROM is accessed through
CPLD registers, which control a read/write state machine within
S

Table 9 and T able 10 summarize the contents of the EEPROM. The first 16
addresses (0x00-0x0F) are written by SBE when the boards are manufactured, and
must not be modified. Space is reserved in the next 32 addresses (0x10-0x2F) for a
total of 16 IP Addresses, beginning with the board IP address and the Gateway I
a

Boot software must read the MAC address from the serial EEPROM and subsequently assign the value
to the MV64462 Ethernet Por

October 10, 2006

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