SBE HighWire HW400c/2 User Manual
HighWire HW400c/2 User Reference Guide Rev 1.0
4.3.2 Writing an
ation/Status Register (EOSR, see
p.
B. Write a “0x01” to the EOSR. This starts the Write Enable operation (EWEN).
. Set the EEPROM Address Register (EAR, see Section 4.2.25) to the desired
word address.
the EEPROM Data Registers EDR0 (LSB) and EDR1 (MSB).
F. Write a “0x02” to the EOSR. This starts the write operation, which typically
G.
step.
e
vented the write operation from completing.
to
4.4 Accessing t
Thi
rd for
ccessing the read and write registers of the BCM5388 Ethernet switch. The CPLD
ages of
registers and up to 255 registers per page. The registers vary in length from 1 to 8
4.4.1 Registers
efer to Sections 4.2.18 to 4.2.24 for CPLD register details. These are the registers
within the CPLD used to access the registers of the BCM5388 Ethernet switch.
ernet switch registers. See the BCM5388 User Guide for full
s, register addresses and byte lengths of each of its
4.4.2 BCM5388
r
WB
EEPROM Address
A. Check the EBSY flag in the EEPROM Oper
Section 4.2.26). If set to “0”, proceed to the next ste
C. Check the EBSY flag. If set to “0”, EWEN is complete – proceed to the next
step.
D
E. Write data bytes to
takes 3 ms to complete.
Check the EBSY flag. If set to “0”, proceed to the next
H. Check the WERR flag. If set to “0”, the write was successful. Otherwise, a writ
protect or other error pre
I. If writing more data, repeat steps [D] through [H]. If finished writing, proceed
the next step.
J. Write a “0x04” to the EOSR. This starts the Write Disable operation (EWDS).
he SPI Interface
s is a description of the interface in the CPLD on the HW400c/2 boa
a
acts as a simplified wrapper for customer and test access to the complex, multi-state
serial SPI interface of the Ethernet switch. The switch has up to 255 p
acts as a simplified wrapper for customer and test access to the complex, multi-state
serial SPI interface of the Ethernet switch. The switch has up to 255 p
bytes, and are byte addressed
in the CPLD
R
(These are NOT the Eth
description, page addresse
registers).
description, page addresse
registers).
Registers Access Rules
There are a few rules for accessing the BCM5388 registers that must be followed fo
successful reads and writes. For writes, the exact register size must be written to the
successful reads and writes. For writes, the exact register size must be written to the
C register, or the write operation will not be completed. For reads, setting the
October 10, 2006
Copyright 2006, SBE, Inc.
Page
64