LSI MegaRAID(R) 6 Gb/s SAS RAID Controllers 25083 User Manual
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Glossary of Terms and Abbreviations
Copyright © 2009 by LSI Corporation. All rights reserved.
host
The computer system in which a RAID controller is installed. It uses the
RAID controller to transfer information to and from devices attached to
the SCSI bus.
RAID controller to transfer information to and from devices attached to
the SCSI bus.
host adapter
board
board
A circuit board or integrated circuit that provides a device connection to
the computer system.
the computer system.
hot spare
An idle, powered on, standby drive that is ready for immediate use in
case of drive failure. A hot spare does not contain any user data. A hot
spare can be dedicated to a single redundant array or it can be part of
the global hot-spare pool for all arrays managed by the controller.
case of drive failure. A hot spare does not contain any user data. A hot
spare can be dedicated to a single redundant array or it can be part of
the global hot-spare pool for all arrays managed by the controller.
When a drive fails, the controller firmware automatically replaces and
rebuilds the data from the failed drive to the hot spare. Data can be
rebuilt only from virtual drives with redundancy (RAID levels 1, 5, 6, 10,
50, and 60; not RAID level 0), and the hot spare must have sufficient
capacity.
rebuilds the data from the failed drive to the hot spare. Data can be
rebuilt only from virtual drives with redundancy (RAID levels 1, 5, 6, 10,
50, and 60; not RAID level 0), and the hot spare must have sufficient
capacity.
internal SAS
device
device
A SAS device installed inside the computer cabinet. These devices are
connected by using a shielded cable.
connected by using a shielded cable.
main memory
The part of computer memory that is directly accessible by the CPU
(usually synonymous with RAM).
(usually synonymous with RAM).
NVRAM
Acronym for nonvolatile random access memory. An EEPROM
(electronically erasable read-only memory) chip that stores configuration
information. Refer to EEPROM.
(electronically erasable read-only memory) chip that stores configuration
information. Refer to EEPROM.
PCI
Acronym for peripheral component interconnect. A high-performance,
local bus specification that allows the connection of devices directly to
computer memory. The PCI Local Bus allows transparent upgrades from
32-bit data path at 33 MHz to 64-bit data path at 33 MHz, and from 32-bit
data path at 66 MHz to 64-bit data path at 66 MHz.
local bus specification that allows the connection of devices directly to
computer memory. The PCI Local Bus allows transparent upgrades from
32-bit data path at 33 MHz to 64-bit data path at 33 MHz, and from 32-bit
data path at 66 MHz to 64-bit data path at 66 MHz.
PCI Express
Acronym for peripheral component interconnect Express. A high-
performance, local bus specification that allows the connection of devices
directly to computer memory. PCI Express is a two-way, serial connection
that transfers data on two pairs of point-to-point data lines. PCI Express
goes beyond the PCI specification in that it is intended as a unifying I/O
architecture for various systems: desktops, workstations, mobile, server,
communications, and embedded devices.
performance, local bus specification that allows the connection of devices
directly to computer memory. PCI Express is a two-way, serial connection
that transfers data on two pairs of point-to-point data lines. PCI Express
goes beyond the PCI specification in that it is intended as a unifying I/O
architecture for various systems: desktops, workstations, mobile, server,
communications, and embedded devices.