LSI 53C810A User Manual
5-11
Register: 0x04 (0x84)
SCSI Chip ID (SCID)
Read/Write
Read/Write
R
Reserved
7
RRE
Enable Response to Reselection
6
When this bit is set, the LSI53C810A is enabled to
respond to bus-initiated reselection at the chip ID in the
respond to bus-initiated reselection at the chip ID in the
register. Note that the
LSI53C810A does not automatically reconfigure itself to
initiator mode as a result of being reselected.
initiator mode as a result of being reselected.
SRE
Enable Response to Selection
5
When this bit is set, the LSI53C810A is able to respond
to bus-initiated selection at the chip ID in the
to bus-initiated selection at the chip ID in the
register. Note that the LSI53C810A does
not automatically reconfigure itself to target mode as a
result of being selected.
result of being selected.
Table 5.2
Asynchronous Clock Conversion Factor
CCF2
CCF1
CCF0
SCSI Clock (MHz)
0
0
0
50.01–66.00
0
0
1
16.67–25.00
0
1
0
25.01–37.50
0
1
1
37.51–50.00
1
0
0
50.01–66.00
1
0
1
Reserved
1
1
0
Reserved
1
1
1
Reserved
7
6
5
4
3
2
0
R
RRE
SRE
R
ENC[2:0]
x
0
0
0
x
0
0
0