Delta Tau GEO BRICK LV User Manual
Turbo PMAC User Manual
Setting Up Turbo PMAC-Based Commutation and/or Current Loop
95
Parameters to Set up Global and Multi-Channel Hardware Signals
PWM Frequency Control: I7m00, MI900, MI906
If you are driving the axes directly (not over the MACRO ring), set Turbo PMAC I-variable I7m00 to
define the PWM frequency for the 4 channels on PMAC2-style Servo IC m according to the equation:
If you are driving the axes directly (not over the MACRO ring), set Turbo PMAC I-variable I7m00 to
define the PWM frequency for the 4 channels on PMAC2-style Servo IC m according to the equation:
−
=
1
)
kHz
(
PWMFreq
*
4
kHz
8
.
964
,
117
int
00
m
7
I
If the axes are being driven from a MACRO Station, MI900 on the Station controls the PWM frequency
of the first four channels on the Station according to the same equation; MI906 does the same for the
second four channels on the Station.
of the first four channels on the Station according to the same equation; MI906 does the same for the
second four channels on the Station.
Set the frequency within the specified range for the drives controlled by Turbo PMAC. Too high a
frequency can lead to excessive drive heating due to switching losses; too low a frequency can lead to
lack of responsiveness, excess acoustic noise, possible physical vibration, and excessive motor heating
due to high current ripple.
frequency can lead to excessive drive heating due to switching losses; too low a frequency can lead to
lack of responsiveness, excess acoustic noise, possible physical vibration, and excessive motor heating
due to high current ripple.
The PWM frequency for any set of channels must have a definite relationship to the phase clock
frequency. If the channels are driven by the same Servo IC that is generating the phase and servo clock,
this relationship is set automatically. If the PWM frequency for channels on another Servo IC is the
same, this relationship also will hold automatically.
frequency. If the channels are driven by the same Servo IC that is generating the phase and servo clock,
this relationship is set automatically. If the PWM frequency for channels on another Servo IC is the
same, this relationship also will hold automatically.
The PWM frequency on other channels does not have to be the same as the frequency of those channels
on the Servo IC generating the phase clock, but they do have to have a synchronous relationship with the
phase clock. The following relationship must hold for proper direct-PWM operation of other channels:
on the Servo IC generating the phase clock, but they do have to have a synchronous relationship with the
phase clock. The following relationship must hold for proper direct-PWM operation of other channels:
}
Integer
{
PhaseFreq
PWMFreq
*
2
=
If a Servo IC is used to generate the Phase and Servo clocks, I7m00 for that IC also sets the frequency of
the MaxPhase clock to twice the PWM frequency for the channels on that IC. (On a Turbo PMAC2
Ultralite board, I6800 for MACRO IC 0 determines the MaxPhase frequency.) The MaxPhase clock is
the highest frequency at which Turbo PMAC’s phase update tasks, which include phase commutation and
digital current loop closure, can operate. Note that any change to this I7m00 automatically changes the
Phase and Servo clock frequencies.
the MaxPhase clock to twice the PWM frequency for the channels on that IC. (On a Turbo PMAC2
Ultralite board, I6800 for MACRO IC 0 determines the MaxPhase frequency.) The MaxPhase clock is
the highest frequency at which Turbo PMAC’s phase update tasks, which include phase commutation and
digital current loop closure, can operate. Note that any change to this I7m00 automatically changes the
Phase and Servo clock frequencies.
Hardware Clock Frequency Control: I7m03, MI903, MI907
I7m03 determines the frequency of four hardware clock signals used for the machine interface channels
on Servo IC m. Probably these can be left at the default values. The four hardware clock signals are
SCLK (encoder sample clock), PFMCLK (pulse frequency modulator clock, DAC_CLK (digital-to-
analog converter clock), and ADCCLK (analog-to-digital converter clock).
I7m03 determines the frequency of four hardware clock signals used for the machine interface channels
on Servo IC m. Probably these can be left at the default values. The four hardware clock signals are
SCLK (encoder sample clock), PFMCLK (pulse frequency modulator clock, DAC_CLK (digital-to-
analog converter clock), and ADCCLK (analog-to-digital converter clock).
If the axes are being driven from a MACRO Station, MI903 on the Station controls the hardware clock
frequencies of the first four channels on the Station according to the same equations; MI907 does the
same for the second four channels on the Station.
frequencies of the first four channels on the Station according to the same equations; MI907 does the
same for the second four channels on the Station.
Only the ADCCLK signal is used directly with the digital current loop, to control the frequency of the
serial data stream from the current-loop ADCs. The ADC clock frequency must be at least 96 times
higher than the PWM frequency, but it must be within the capability of the serial ADCs. Refer to the
I7m03 description for detailed information on setting these variables.
serial data stream from the current-loop ADCs. The ADC clock frequency must be at least 96 times
higher than the PWM frequency, but it must be within the capability of the serial ADCs. Refer to the
I7m03 description for detailed information on setting these variables.
The encoder SCLK frequency should be at least 20% greater than the maximum count (edge) rate that is
possible for the encoder on any axis. Higher SCLK frequencies than this minimum may be used, but
these make the digital delay anti-noise filter less effective.
possible for the encoder on any axis. Higher SCLK frequencies than this minimum may be used, but
these make the digital delay anti-noise filter less effective.