Delta Tau GEO BRICK LV User Manual

Page of 440
 
Turbo PMAC User Manual 
6 
Turbo PMAC Family Overview 
• 
Option 5Cx (the x specifies the external memory size – see below) provides an 80 MHz DSP56303 
with 8k 24-bit words of internal memory.  This is the default processor. 
• 
Option 5Dx provides a 100 MHz DSP56309 with 34k 24-bit words of internal memory. 
• 
Option 5Ex provides a 160 MHz DSP56311 with 128k 24-bit words of internal memory.  These 
options require firmware revision V1.939 or newer. 
• 
Option 5Fx (expected release in 3
rd
 quarter 2003) provides a 240 MHz DSP56321 with 192k 24-bit 
words of internal memory.  These options require firmware revision V1.940 or newer. 
Not all of these options are available in all Turbo PMAC configurations. 
Note: 
Just because a processor is capable of operating at a particular frequency does not 
mean that it will actually be operating at that frequency.  The value of Turbo 
PMAC variable I52 at power-up/reset controls what the operating frequency of the 
processor will be: 10 MHz * (I52+1).  The default value of I52 is 7, for 80 MHz 
operation, regardless of the CPU speed option ordered.  The TYPE command will 
show the frequency at which the CPU is actually operating. 
To locate the CPU part number, issue the CPU on-line command.  Turbo PMAC will respond with the 
part number (e.g. 56311).  Internally, global status bits X:$000006 bit 21 and Y:$000006 bit 21 (part of 
the ??? global status query word) indicate which type of CPU is present. 
Active Memory 
Turbo PMAC uses static RAM (SRAM) ICs for its active memory.  This type of RAM is faster and more 
robust than the dynamic RAM (DRAM) that forms the bulk of the PC’s memory.  (SRAM ICs are used 
for the PC’s fast cache memory bank.) 
As with any RAM ICs, the contents of these SRAM ICs (as well as memory registers internal to the DSP, 
and memory-mapped registers in the ASICs) are lost when power is removed.  Settings that should be 
retained through a power-down must first be copied to non-volatile flash memory with the SAVE 
command. 
The Motorola DSPs employ a Harvard architecture, which uses separate memory banks for program 
(compiled or assembled machine code instructions) storage and data (everything else, including 
interpreted program commands) storage.  This is in contrast to the more common von Neumann 
architecture that the PC uses, in which any memory can be used for program or data storage. 
The standard memory configuration for a Turbo PMAC (Option 5x0, where “x” specifies the CPU speed, 
as explained above) provides 128k 24-bit words of program memory, and 128k 24-bit words (organized 
as 64k 48-bit words) of data memory, in addition to what is internal to the DSP.  This is the default 
configuration.  With the standard memory configuration, the total addressable memory is the sum of 
memory internal to the DSP and the external memory in the SRAM ICs; getting a DSP with more internal 
memory adds to your total memory capacity. 
If the extended memory configuration is ordered (Option 5x3), the Turbo PMAC comes with a total of 
512k 24-bit words of program memory, and 512k 24-bit words (organized as 256k 48-bit words) of data 
memory.  With the extended memory configuration, the total addressable memory is limited by the 
addressing space of the DSP; getting a DSP with more internal memory does not add to the total memory 
capacity (although it does substitute faster internal memory for slower external memory).