Delta Tau GEO BRICK LV User Manual
Turbo PMAC User Manual
Turbo PMAC System Configuration and Auto Configuration
19
Typical Clock-Source ICs
On a board-level Turbo PMAC2 controller that is not an Ultralite MACRO-only controller, usually the
system clock source is Servo IC 0, the first on-board Servo IC. This means that I7007 is set to 0, so that
I7000, I7001, and I7002 control the system clock frequencies. Other clock-direction I-variables should be
set to 3. The same is true for 3U Turbo Stack controllers.
system clock source is Servo IC 0, the first on-board Servo IC. This means that I7007 is set to 0, so that
I7000, I7001, and I7002 control the system clock frequencies. Other clock-direction I-variables should be
set to 3. The same is true for 3U Turbo Stack controllers.
On a Turbo PMAC2 Ultralite controller, or a UMAC Turbo system utilizing the MACRO ring, usually
the system clock source is MACRO IC 0, the first MACRO IC. This means that I6807 is set to 0, so that
I6800, I6801, and I6802 control the system clock frequencies. Other clock-direction I-variables should be
set to 3.
the system clock source is MACRO IC 0, the first MACRO IC. This means that I6807 is set to 0, so that
I6800, I6801, and I6802 control the system clock frequencies. Other clock-direction I-variables should be
set to 3.
On a UMAC Turbo system that does not utilize the MACRO ring (which is most UMAC Turbo systems),
usually the system clock source is Servo IC 2, the first Servo IC on the UBUS backplane. This means
that I7207 is set to 0, so that I7200, I7201, and I7202 control the system clock frequencies. Other clock-
direction I-variables should be set to 3.
usually the system clock source is Servo IC 2, the first Servo IC on the UBUS backplane. This means
that I7207 is set to 0, so that I7200, I7201, and I7202 control the system clock frequencies. Other clock-
direction I-variables should be set to 3.
External Clock Sources
It is possible to set up a Turbo PMAC or Turbo PMAC2 system to use externally generated phase and
servo clock signals brought in through extra pins on the main serial port. Sometimes these clock signals
will come from another Turbo PMAC that is part of the same system in order to keep all of the controllers
fully synchronized. Other times they may come from a video system in order to fully synchronize the
motion to the video frames. Still other times they may come from a reference clock much more precise
than Turbo PMAC’s own clock crystal; this is common in the tracking control of telescopic systems.
servo clock signals brought in through extra pins on the main serial port. Sometimes these clock signals
will come from another Turbo PMAC that is part of the same system in order to keep all of the controllers
fully synchronized. Other times they may come from a video system in order to fully synchronize the
motion to the video frames. Still other times they may come from a reference clock much more precise
than Turbo PMAC’s own clock crystal; this is common in the tracking control of telescopic systems.
On a Turbo PMAC system, if any of the jumpers E40 – E43 are removed, it will expect externally
generated phase and servo clocks. On a Turbo PMAC2 system, this function is determined by jumper E1
on board-level Turbo PMACs and jumpers E1A and E1B on the CPU board of a UMAC system.
generated phase and servo clocks. On a Turbo PMAC2 system, this function is determined by jumper E1
on board-level Turbo PMACs and jumpers E1A and E1B on the CPU board of a UMAC system.
It is recommended that the servo and phase clock signals provided to a Turbo PMAC each are differential
5V pairs (RS-422 levels). However, single-ended 5V signals can be accepted into the “+” inputs; the “-”
inputs should be left unconnected and will be held at 2.5V internally. The phase clock signal should have
a 50% duty cycle. The servo clock must be synchronous with the phase clock, with a period of n phase
clock periods, where n is a positive integer. The falling edge of the SERVO+ signal must be coincident
with the falling edge of the PHASE+ signal, and the SERVO+ signal should be low for at most 1 phase-
clock cycle.
5V pairs (RS-422 levels). However, single-ended 5V signals can be accepted into the “+” inputs; the “-”
inputs should be left unconnected and will be held at 2.5V internally. The phase clock signal should have
a 50% duty cycle. The servo clock must be synchronous with the phase clock, with a period of n phase
clock periods, where n is a positive integer. The falling edge of the SERVO+ signal must be coincident
with the falling edge of the PHASE+ signal, and the SERVO+ signal should be low for at most 1 phase-
clock cycle.
For more details on the use of external clock signals, refer to the Synchronizing Turbo PMAC to External
Events section of this manual.
Events section of this manual.
Distribution of Clock Signals
Whatever the source of the phase and servo clock signals, these signals must be available to the processor
and all Servo ICs and MACRO ICs, plus any other circuits that use these signals in their functioning
(such as I/O cards that are used for parallel or serial feedback). Note that the hardware clock signals – the
DAC clock, ADC clock, encoder sample clock, and PFM clock – are generated locally inside each Servo
IC and MACRO IC, and are not shared between ICs.
and all Servo ICs and MACRO ICs, plus any other circuits that use these signals in their functioning
(such as I/O cards that are used for parallel or serial feedback). Note that the hardware clock signals – the
DAC clock, ADC clock, encoder sample clock, and PFM clock – are generated locally inside each Servo
IC and MACRO IC, and are not shared between ICs.
Board-Level Turbo PMACs
On a board-level Turbo PMAC, the clock source must be one of the on-board Servo ICs or MACRO ICs,
and the clock signals are just transmitted over circuit traces on the board, and if there is a piggyback CPU
board, up to the CPU board. The servo and phase clock signals are always present as outputs (never
inputs) on the JEXP expansion port for accessory boards connected to this port. These signals are also
available as buffered differential outputs on extra pins on the RS-422 serial port connector for other
devices.
and the clock signals are just transmitted over circuit traces on the board, and if there is a piggyback CPU
board, up to the CPU board. The servo and phase clock signals are always present as outputs (never
inputs) on the JEXP expansion port for accessory boards connected to this port. These signals are also
available as buffered differential outputs on extra pins on the RS-422 serial port connector for other
devices.