Delta Tau GEO BRICK LV User Manual
Turbo PMAC User Manual
366
Synchronizing Turbo PMAC to External Events
Starting Position
B
B
0
A
0
B
1
A
1
Auto-Increment
Example: Starting from the above example, desiring the compare output on between 1000 (A
0
) and 1010
(B
1
) counts, but adding an auto-increment value of 2000 counts, with a starting position of about 100
counts, program code to start the sequence could be:
M110=2000
; Auto-increment of 2000 encoder counts
M108=1000
; First front edge (A0) at 1000 counts
M109=1010-M110
; First back edge (B1) at 1010 counts
M112=0
; Prepare initial value of 0
M111=1
; Enable direct write (resets immediately to 0)
{Command to start the move}
Fractional-Count Compare
Starting in the D revision of the DSPGATE1 PMAC2-style Servo IC (starting shipping in 2002), the
compare circuitry has the capability of triggering the output at a fractional count value, not just at the
nearest whole number of counts. This IC can create a fractional count value every encoder-sample clock
(SCLK) cycle using 1/T timer-based techniques and use this extended count value in the position-
compare (and capture) circuitry. This capability is not possible in PMAC-style Servo ICs.
This capability is particularly valuable when using a sinusoidal encoder through an interpolator circuit,
such as the Acc-51E. The interpolator greatly increases the resolution of the servo feedback, but does not
by itself increase the resolution of the compare function. Note, however, that use of a sinusoidal encoder
and interpolator is not required for the extended compare function; it works identically with digital
quadrature encoders.
This extended-count mode is enabled for Servo IC m Channel n by setting variable I7mn9 to 1. This
variable was implemented in V1.937 firmware, but not documented until the V1.939 software reference
manual (because the ICs that could use it did not start shipping until then). With I7mn9 set to the factory
default value of 0, the extended-count mode is disabled. This single-bit I-variable is bit 18 in the control
word for the channel in the IC.
When this mode is enabled, the meaning of the two 24-bit timer registers for the channel changes. (This
means that you cannot use the traditional software 1/T count extension in the conversion table for this
channel; if you are using digital quadrature encoders in this mode, you must use the new “hardware 1/T”
conversion method.) In extended-count mode these two registers contain four 12-bit values. The lower
half of each register contains the fractional count value for the position compare function. Suggested M-
variables for these values for Servo IC 0 Channel 1 are:
compare circuitry has the capability of triggering the output at a fractional count value, not just at the
nearest whole number of counts. This IC can create a fractional count value every encoder-sample clock
(SCLK) cycle using 1/T timer-based techniques and use this extended count value in the position-
compare (and capture) circuitry. This capability is not possible in PMAC-style Servo ICs.
This capability is particularly valuable when using a sinusoidal encoder through an interpolator circuit,
such as the Acc-51E. The interpolator greatly increases the resolution of the servo feedback, but does not
by itself increase the resolution of the compare function. Note, however, that use of a sinusoidal encoder
and interpolator is not required for the extended compare function; it works identically with digital
quadrature encoders.
This extended-count mode is enabled for Servo IC m Channel n by setting variable I7mn9 to 1. This
variable was implemented in V1.937 firmware, but not documented until the V1.939 software reference
manual (because the ICs that could use it did not start shipping until then). With I7mn9 set to the factory
default value of 0, the extended-count mode is disabled. This single-bit I-variable is bit 18 in the control
word for the channel in the IC.
When this mode is enabled, the meaning of the two 24-bit timer registers for the channel changes. (This
means that you cannot use the traditional software 1/T count extension in the conversion table for this
channel; if you are using digital quadrature encoders in this mode, you must use the new “hardware 1/T”
conversion method.) In extended-count mode these two registers contain four 12-bit values. The lower
half of each register contains the fractional count value for the position compare function. Suggested M-
variables for these values for Servo IC 0 Channel 1 are:
M188->Y:$078001,0,12,U ; Compare A fractional count
M189->Y:$078000,0,12,U ; Compare B fractional count
These registers must be used as unsigned values. Treated this way, these registers take a value of 0 to
4095, representing a (whole) count value 1/4096 as big. Higher values of fractional count are closer to
the more positive whole count, regardless of the direction of motion.
Note carefully what a count means here. Because we are dealing with the hardware counter in the Servo
IC, these are hardware counts – one unit of the hardware counter. With the times-4 decode that is almost
universally used (and must be used with the Acc-51 boards), there are 4 hardware counts per line (signal
cycle) of the encoder.
4095, representing a (whole) count value 1/4096 as big. Higher values of fractional count are closer to
the more positive whole count, regardless of the direction of motion.
Note carefully what a count means here. Because we are dealing with the hardware counter in the Servo
IC, these are hardware counts – one unit of the hardware counter. With the times-4 decode that is almost
universally used (and must be used with the Acc-51 boards), there are 4 hardware counts per line (signal
cycle) of the encoder.