Delta Tau GEO BRICK LV User Manual
Turbo PMAC User Manual
376
Writing and Executing PLC Programs
A compiled PLC program is labeled PLCC n (PLC-Compiled #n) on Turbo PMAC. This distinguishes it
from an interpreted PLC, which is simply labeled PLC n. There is no special relationship between the
interpreted and compiled PLCs of the same number.
from an interpreted PLC, which is simply labeled PLC n. There is no special relationship between the
interpreted and compiled PLCs of the same number.
Execution of Compiled PLCs
Of the 32 compiled PLC programs (PLCC 0 to PLCC 31) only PLCC 0 operates in the foreground,
triggered by the real-time interrupt (RTI). PLCCs 1 to 31 operate as background tasks.
triggered by the real-time interrupt (RTI). PLCCs 1 to 31 operate as background tasks.
At each real-time interrupt, Turbo PMAC checks to see whether several user tasks need to be done. The
real-time interrupt occurs every (I8+1) servo cycles. Turbo PMAC checks the tasks in the following
order:
real-time interrupt occurs every (I8+1) servo cycles. Turbo PMAC checks the tasks in the following
order:
1. Motion
program
move
planning:
Turbo PMAC checks to see in each coordinate system whether it is
time to calculate the next move in the program.
2. Interpreted PLC 0: Turbo PMAC checks to see if I5=1 or 3 and if PLC 0 is enabled. If so, it executes
one scan of PLC 0.
3. Compiled PLC 0: Turbo PMAC checks to see if I5=1 or 3 and if PLCC 0 is enabled. If so, it executes
one scan of PLCC 0.
It is important that the scan execution time of PLCC 0 and PLC 0 be kept less than one real-time interrupt
period. Otherwise, their repeated execution will starve the background for time, and probably trip the
watchdog timer.
period. Otherwise, their repeated execution will starve the background for time, and probably trip the
watchdog timer.
In background, Turbo PMAC executes one scan of a single background interpreted PLC program
uninterrupted by any other background task (although higher-priority tasks will interrupt). In between
each scan of each individual background interpreted PLC program, Turbo PMAC will execute one scan of
all active background compiled PLCs. This means that the background compiled PLCs execute at a
higher scan rate than the background interpreted PLCs. For example, if there are seven active background
interpreted PLCs, each background compiled PLC will execute seven scans for each scan of a background
interpreted PLC.
uninterrupted by any other background task (although higher-priority tasks will interrupt). In between
each scan of each individual background interpreted PLC program, Turbo PMAC will execute one scan of
all active background compiled PLCs. This means that the background compiled PLCs execute at a
higher scan rate than the background interpreted PLCs. For example, if there are seven active background
interpreted PLCs, each background compiled PLC will execute seven scans for each scan of a background
interpreted PLC.
Writing Compiled PLC Programs
You can write compiled PLCs just as you write the standard interpreted PLCs, using a standard text editor
such as that in the PMAC Executive program. All statements that can be used in an interpreted PLC
program also can be used in a compiled PLC program, so it is possible to change an interpreted PLC to a
compiled PLC without any code changes.
such as that in the PMAC Executive program. All statements that can be used in an interpreted PLC
program also can be used in a compiled PLC program, so it is possible to change an interpreted PLC to a
compiled PLC without any code changes.
However, compiled PLC programs support additional programming features that increase their efficiency
and flexibility. These features are described below. Remember that these features are not supported in
interpreted PLCs.
and flexibility. These features are described below. Remember that these features are not supported in
interpreted PLCs.
Compiler-Assigned Pointer Variables
For direct and efficient access to Turbo PMAC registers, compiled PLC programs support two types of
pointer variables for which the register assignment is made at compilation time, not at program execution
time.
pointer variables for which the register assignment is made at compilation time, not at program execution
time.
L-Variables: Short Integer Pointers
L-variables are pointers to short (24-bit) registers, treated as integer (fixed-point) values. These work in
the same way as L-variables do in compiled PLC programs. They can access either X or Y short
registers, either as entire 24-bit registers (treated as signed integers only), or as portions of the registers 1,
4, 8, 12, 16, or 20 bits wide (treated as signed or unsigned integers, except for 1-bit variables, which are
unsigned only).
L-variables are pointers to short (24-bit) registers, treated as integer (fixed-point) values. These work in
the same way as L-variables do in compiled PLC programs. They can access either X or Y short
registers, either as entire 24-bit registers (treated as signed integers only), or as portions of the registers 1,
4, 8, 12, 16, or 20 bits wide (treated as signed or unsigned integers, except for 1-bit variables, which are
unsigned only).
Legal L-variable names for the compiler contain the letter L followed by an integer in the range 0 to 8191,
for a total of 8192 possible L-variables (L0 to L8191).
for a total of 8192 possible L-variables (L0 to L8191).