Delta Tau GEO BRICK LV User Manual

I94 controls the VME address bus bits A15 – A08 for the mailbox registers.  If bits A23 – A16 are the 
same for both the mailbox registers and the DPRAM, it is essential that I94 be set up so that there is no 
conflict between the 512 addresses required for the mailbox registers and the 16k registers required for 
the DPRAM. 

I95 controls which interrupt line is used when PMAC interrupts the host computer over the bus.  Values 
of $01 to $07 select IRQ1 to IRQ7, respectively.  Turbo PMAC will use this interrupt line during 
DPRAM ASCII communications if I56 is set to 1 and I58 is set to 1. 

I96 controls the interrupt vectors that are provided when Turbo PMAC interrupts the host computer.  If 
the interrupt is asserted because PMAC has placed an ASCII response line in the DPRAM, the interrupt 
vector provided is equal to (I96 + 1). 

I97 controls the VME address bus bits A23 – A20 for the DPRAM.  It is usually specified as a 2-digit 
hexadecimal value.  The first digit should always be set to 0.  The second digit should be set to be equal to 
the 1

st

 of 6 hex digits of the address if 24-bit addressing is used, or to the 3

rd

 of 8 hex digits of the address 

if 32-bit addressing is used.  For example, if the base address is $700000 in 24-bit addressing, I97 should 
be set to $07.  If the base address is $18C40000 in 32-bit addressing, I97 should be set to $0C. 

I98 controls whether the DPRAM is enabled.  It should be set to $E0 to enable DPRAM access. 

I99 controls the VME bus address width.  It should be set to $90 for 24-bit addressing with DPRAM, or 
to $80 for 32-bit addressing with DPRAM. 

To implement these settings and to hold them for future use, these I-variable values must be stored to 
non-volatile flash memory with the SAVE command, and the card must be reset ($$$ command).  
Resetting the card copies the saved values of I90 – I99 back into the I-variable registers in RAM, and then 
into the active control registers at X:$070006 – X:$07000F. 

One further step must be taken after every power-on/reset to select the VME address lines A19 – A14 for 
the DPRAM.  These address lines are selected using a dynamic page-select technique, which must be 
used even if there is only a single “page” of DPRAM.  One page consists of a 16k x 8 bank of memory 
addresses – for the small (8k x 16) DPRAM, this page selects the entire DPRAM.  For the large (32k x 
16) DPRAM (when available), this page selects one-quarter of the DPRAM. 

These address lines are selected by writing a byte over the VME bus to (the mailbox base address + 
$121).  The mailbox base address is defined by the settings of I92, I93, and I94 at the last power-on/reset.  
If the mailbox base address is at the default value of $7FA000, this byte must be written to VME bus 
address $7FA121. 

Bits 0 to 5 of this byte must contain the values of A14 to A19, respectively, of the page of the DPRAM.  
One way to calculate this value is to take the 2

nd

 and 3

rd

 hex digits of the DPRAM page base address in 

24-bit addressing, or the 4

th

 and 5

th

 hex digits in 32-bit addressing, and divide this value by 4 (shift right 

two bits). For example, if the base address is $780000 in 24-bit addressing, this byte should be set to $20 
($80/4 = $20).  If the base address is $18C40000 in 32-bit addressing, this byte should be set to $10. 

It is common that this byte value will be $00, and some Turbo PMAC-VME 
boards will power up with this byte already set at $00.  However, this may not be 
true on some boards, so the user should not count on this default setting.  For 
robust operation, this byte must be written after every power-on/reset. 

PCI Bus 

When using DPRAM communications over the PCI bus, the computer’s operating system automatically 
establishes the base address of the DPRAM IC on the bus.  Consult the documentation for the operating 
system to understand how to find and use the base address established by the operating system.