Intel Video Game Controller Intel Gigabit Ethernet Controllers User Manual
Software Developer’s Manual
115
EEPROM Interface
5.6.26
Initialization Control 3 (Word 14h
1
high byte, 24h high byte)
This word controls the general initialization values.
Note: Since the 82546GB/EB is a dual-port device, the Initialization Control Word 3 bit assignments are
port specific.
1.
Applicable to the 82546GB/EB only.
Table 5-12. Initialization Control 3
Bit
Name
Description
7:5
Reserved
Reserved. Set these bits to 0b.
4
Interrupt Pin
Controls the value advertised in the Interrupt Pin field of the PCI
Configuration header for this device/function.
A value of 0b (default), reflected in the Interrupt Pin field, indicates that
the 82546GB/EB uses INTA#; a value of 1b indicates that the
82546GB/EB uses INTB#.
If only a single device/function of the Ethernet controller is enabled, this
value is ignored and the Interrupt Pin field of the enabled device reports
INTA# usage.
Configuration header for this device/function.
A value of 0b (default), reflected in the Interrupt Pin field, indicates that
the 82546GB/EB uses INTA#; a value of 1b indicates that the
82546GB/EB uses INTB#.
If only a single device/function of the Ethernet controller is enabled, this
value is ignored and the Interrupt Pin field of the enabled device reports
INTA# usage.
3
FLASH Disable
Set this bit to 0b (default) to enable the FLASH logic.
Set this bit to 1b to disable the FLASH logic. Note that the Expansion
ROM & secondary FLASH access BARs in PCI configuration space are
also disabled.
Set this bit to 1b to disable the FLASH logic. Note that the Expansion
ROM & secondary FLASH access BARs in PCI configuration space are
also disabled.
2
APM Enable
Initial value of Advanced Power Management Wakeup Enable in the
Wakeup Control Register (WUC.APME).
The default for this bit is 0b.
Wakeup Control Register (WUC.APME).
The default for this bit is 0b.
1:0
Link Mode
Initial value of Link Mode bits of the Extended Device Control Register
(CTRL_EXT.LINK_MODE), specifying which link interface and protocol
is used by the MAC.
For Address 24h (High Byte) / LAN A
00b = MAC operates in GMII/MII mode with internal copper PHY
(CTRL_EXT.LINK_MODE), specifying which link interface and protocol
is used by the MAC.
For Address 24h (High Byte) / LAN A
00b = MAC operates in GMII/MII mode with internal copper PHY
a
01b = External GMII/MII mode
10b = Internal SerDes mode (not applicable to the 82540EP/EM)
11b = MAC operates in TBI mode using external TBI interface
For Address 14h (High Byte) / LAN B
00b = MAC operates in GMII/MII mode with internal copper PHY
01b = Reserved
10b = Internal SerDes mode (not applicable to the 82540EP/EM)
11b = MAC operates in TBI mode using external TBI interface
10b = Internal SerDes mode (not applicable to the 82540EP/EM)
11b = MAC operates in TBI mode using external TBI interface
For Address 14h (High Byte) / LAN B
00b = MAC operates in GMII/MII mode with internal copper PHY
01b = Reserved
10b = Internal SerDes mode (not applicable to the 82540EP/EM)
11b = MAC operates in TBI mode using external TBI interface
a.
For the 82540EP/EM, 82541PI/GI/EI, and 82547GI/EI to properly communicate with the internal copper PHY, this value
must be set to 00b.
must be set to 00b.