Intel Video Game Controller Intel Gigabit Ethernet Controllers User Manual

Page of 406
Software Developer’s Manual
353
Register Descriptions
This register does not increment when flow control packets are received.
Table 13-125. RNBC Register Bit Description
13.7.34
Receive Undersize Count
RUC (040A4h; R)
This register counts the number of received frames that passed address filtering, and were less than 
minimum size (64 bytes from <Destination Address> through <CRC>, inclusively), and had a 
valid CRC. This register only increments if receives are enabled.
Table 13-126. RUC Register Bit Description
13.7.35
Receive Fragment Count
RFC (040A8h; R)
This register counts the number of received frames that passed address filtering, and were less than 
minimum size (64 bytes from <Destination Address> through <CRC>, inclusively), but had a bad 
CRC (this is slightly different from the Receive Undersize Count register). This register only 
increments if receives are enabled.
31
0
RNBC
Field
Bit(s)
Initial 
Value
Description
RNBC
31:0
0b
Number of receive no buffer conditions.
31
0
RUC
Field
Bit(s)
Initial 
Value
Description
RUC
31:0
0b
Number of receive undersize errors.