Lucent Technologies MN10285K User Manual
Interrupts
Description
MN102H75K/F75K/85K/F85K LSI User Manual
Panasonic Semiconductor Development Company
39
Panasonic
Figure 2-3 Interrupt Servicing Time
Table 2-2 Handler Preprocessing
Sequence
Assembler
Bytes
Cycles
Push registers
add -8,A3
mov A0,(A3)
movx D0,(4,A3)
2
2
3
1
2
3
Interrupt ACK
mov (FC0E),D0
3
1
Generate header address
for interrupt service routine
for interrupt service routine
mov BASE,A0
mov (D0,A0),A0
3
2
1
2
Branch
jsr (A0)
2
5
Total
17
15
Table 2-3 Handler Postprocessing
Sequence
Assembler
Bytes
Cycles
Pop registers
mov (A3),A0
movx (4,A3),D0
add 8,A3
2
3
2
2
3
1
Total
7
6
Program
Interrupt
Max. 6 cycles
In
ter
rup
t h
ardware
pr
ocessin
g
(9
cy
cles)
Handler
(preprocessing)
Interrupt service
routine
Handler
(postprocessing)
Address 80008
jsr (5
cycle
s)
rts (5 cycle
s)
Registers popped
rti
(7
cycles)
The interrupt request is
deleted in the header
(Included in the cycle
count shown to the left.)
deleted in the header
(Included in the cycle
count shown to the left.)