IBM 600 User Manual
Specifications
Figure 1-4 to Figure 1-7 list the specifications for the computers.
Performance Specifications
Figure 1-4. Performance Specifications
Device/Cycle
Clock Counts
(66 MHz)
(66 MHz)
Microprocessor
233 or 266
MHz
MHz
L1 cache (64bit)
read/write hit
1 CPUCLK
L2 cache (64bit) (for not all
models)
read hit (back-to-back)
write hit (back-to-back)
write hit (back-to-back)
3-1-1-1(1-1-1-1)
Memory (64bit) (see Note)
read, page hit
read, bank miss
read, page miss
read, bank miss
read, page miss
5-1-1-1
8-1-1-1
11-1-1-1
posted write
write retire rate from
write buffer
3-1-1-1
-1-1-1
-1-1-1
Note:
The cycle times shown for access to system
board RAM are based on 66 MHz memory bus
(SDRAM, CAS LATENCY=2)
board RAM are based on 66 MHz memory bus
(SDRAM, CAS LATENCY=2)
System Overview
1-7