Lucent Technologies MN102H75K User Manual

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Closed-Caption Decoder
Functional Description
MN102H75K/F75K/85K/F85K LSI User Manual
Panasonic Semiconductor Development Company
235
Panasonic
9.3.5.1 CRI Detection for Sampling Clock Generation
The decoder captures the caption data on the rising edge of the CRI pulse. To 
achieve this, it contains a circuit to accurately detect the CRI pulse rises and to 
generate a data sampling clock.
9.3.5.2 Data Capture Control
The DATAS and DATAE registers control the data capture timing, and the 
CAPDATA register stores the caption data captured on the sampling clock gen-
erated through CRI detection. The HNUM register controls interrupt timing.
Figure 9-10 Sampling Clock Timing Determination
Figure 9-11 Caption Data Capture Timing
21 HSYNC
CRI
Data
CRI2S
CRI2E
This interval determines the sampling clock timing.
CRI detection
21 HSYNC
CRI
Data
DATAS
DATAE
(Sampling clock)
(CRI2S)