Fujitsu FR20 User Manual

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18.3
Operation of 10-bit General-purpose Prescaler
Division operation of the 10-bit general-purpose prescaler and updating operation of the 
reload data latch are described.
Division Operation and PO Output
Figure 18.3-1 shows the operation of general-purpose prescaler.
Figure 18.3-1  Operation of general-purpose prescaler
Figure 18.3-2  PO output timing 
Update Operation of Reload Data Latch
For updating operation of the reload data latch, there are two operation modes, namely updating by
rewriting the data register and updating at both edges of the PPG output. Switch operation mode can be
selected by the LDM bit of the GPRC.
Update mode operation by rewriting data register 
Under this mode, writing data register executes loading to the reload data latch. Newly loaded data
(division value) is changed to operation with new division value as soon as the division operation using the
previous value ends.
Update of the data register under this mode must be executed at an interval of "2 cycles of the clock
selected by the clock selection bit + 1 machine cycle" or more.
Count value
ST
PO output (Pulse)
PO output (1/2)
Reload Data Latch
0000
H
CLK
Count value
PO output (Pulse)
PO output (1/2)
002
001
000
XXX
XXX-1
001
000
000
XXX