Fujitsu FR20 User Manual

3.12

Clock Generation Section (Low Power Consumption
Mechanism)

The clock generation section is the modules that have the following functions:

• CPU clock generation (including the gear function)

• Peripheral clock generation (including the gear function)

• Reset generation and cause retention

• Standby function

• Built-in PLL (duty correction circuit)

■

Register in Clock Generation Section

Figure 3.12-1 Register in Clock Generation Section

RSRR/WTCR

Reset Factor/Watchdog Cycle Control Register

STCR

Standby Control Register

Reserve

(Access interdiction)

CTBR

Timebase Timer Clear Register

GCR

Gear Control Register

WPR

Watchdog Reset Generation Dalayed Register

bit

Address: 000480

000481

000482

000483

000484

000485