Intel Desktop Board D945PWM User Manuals

Table of Contents

• Intel® Desktop Board D945PWM Technical Product Specification

  1
• Revision History / Disclaimer

  2
• Preface

  3
  • Intended Audience

    3
  • What This Document Contains

    3
  • Typographical Conventions

    3
• Contents

  5
• 1 Product Description

  9
  • 1.1 Overview

    10
    • 1.1.1 Feature Summary

      10
    • 1.1.2 Board Layout

      12
    • 1.1.3 Block Diagram

      14
  • 1.2 Online Support

    15
  • 1.3 Processor

    15
  • 1.4 System Memory

    16
    • 1.4.1 Memory Configurations

      17
  • 1.5 Intel® 945P Chipset

    21
    • 1.5.1 USB

      21
    • 1.5.2 IDE Support

      22
    • 1.5.3 Real-Time Clock, CMOS SRAM, and Battery

      23
  • 1.6 PCI Express* Connectors

    27
  • 1.7 IEEE-1394a Connectors

    27
  • 1.8 Legacy I/O Controller

    28
    • 1.8.1 Serial Port

      28
    • 1.8.2 Parallel Port

      28
    • 1.8.3 Diskette Drive Controller

      28
    • 1.8.4 Keyboard and Mouse Interface

      28
  • 1.9 Audio Subsystem

    29
    • 1.9.1 Audio Subsystem Software

      29
    • 1.9.2 Audio Connectors

      29
    • 1.9.3 8-Channel (7.1) Audio Subsystem

      29
  • 1.10 LAN Subsystem

    31
    • 1.10.1 LAN Subsystem Software

      31
    • 1.10.2 Intel® 82562GX Physical Layer Interface Device

      31
    • 1.10.3 RJ-45 LAN Connector with Integrated LEDs

      31
  • 1.11 Hardware Management Subsystem

    32
    • 1.11.1 Hardware Monitoring and Fan Control ASIC

      32
    • 1.11.2 Chassis Intrusion and Detection

      32
    • 1.11.3 Fan Monitoring

      33
    • 1.11.4 Thermal Monitoring

      33
  • 1.12 Power Management

    34
    • 1.12.1 ACPI

      34
    • 1.12.2 Hardware Support

      36
• 2 Technical Reference

  41
  • 2.1 Introduction

    41
  • 2.2 Memory Resources

    41
    • 2.2.1 Addressable Memory

      41
    • 2.2.2 Memory Map

      43
  • 2.3 DMA Channels

    43
  • 2.4 Fixed I/O Map

    44
  • 2.5 PCI Configuration Space Map

    45
  • 2.6 Interrupts

    46
  • 2.7 PCI Conventional Interrupt Routing Map

    47
  • 2.8 Connectors

    48
    • 2.8.1 Back Panel Connectors

      49
    • 2.8.2 Component-side Connectors

      50
  • 2.9 Jumper Block

    59
  • 2.10 Mechanical Considerations

    60
    • 2.10.1 Form Factor

      60
    • 2.10.2 I/O Shield

      61
  • 2.11 Electrical Considerations

    62
    • 2.11.1 DC Loading

      62
    • 2.11.2 Add-in Board Considerations

      62
    • 2.11.3 Fan Connector Current Capability

      63
    • 2.11.4 Power Supply Considerations

      63
  • 2.12 Thermal Considerations

    64
  • 2.13 Reliability

    66
  • 2.14 Environmental

    67
  • 2.15 Regulatory Compliance

    68
    • 2.15.1 Safety Regulations

      68
    • 2.15.2 European Union Declaration of Conformity Statement

      68
    • 2.15.3 Product Ecology Statements

      70
    • 2.15.4 EMC Regulations

      73
    • 2.15.5 Product Certification Markings (Board Level)

      74
• 3 Overview of BIOS Features

  75
  • 3.1 Introduction

    75
  • 3.2 BIOS Flash Memory Organization

    76
  • 3.3 Resource Configuration

    76
    • 3.3.1 PCI Autoconfiguration

      76
    • 3.3.2 PCI IDE Support

      76
  • 3.4 System Management BIOS (SMBIOS)

    77
  • 3.5 Legacy USB Support

    77
  • 3.6 BIOS Updates

    78
    • 3.6.1 Language Support

      78
    • 3.6.2 Custom Splash Screen

      78
  • 3.7 Boot Options

    79
    • 3.7.1 CD-ROM Boot

      79
    • 3.7.2 Network Boot

      79
    • 3.7.3 Booting Without Attached Devices

      79
    • 3.7.4 Changing the Default Boot Device During POST

      79
  • 3.8 Adjusting Boot Speed

    80
    • 3.8.1 Peripheral Selection and Configuration

      80
    • 3.8.2 BIOS Boot Optimizations

      80
  • 3.9 BIOS Security Features

    81
• 4 Error Messages and Beep Codes

  83
  • 4.1 Speaker

    83
  • 4.2 BIOS Beep Codes

    83
  • 4.3 BIOS Error Messages

    83
  • 4.4 Port 80h POST Codes

    84