User ManualTable of ContentsChapter 1 General Description81.1 OEM Selectable Features9Chapter 2 Pin Layout10Table 2.1 USB2524 56-Pin QFN Pin Configuration Table10Chapter 3 Pin Configuration11Figure 3.1 USB2524 QFN-5611Chapter 4 Switching Hub Pin Descriptions12Table 4.1 Switching Hub Pin Descriptions12Table 4.2 SMBus or EEPROM Interface Behavior14Table 4.3 Miscellaneous Pins15Table 4.4 Power, Ground, and No Connect15Table 4.5 Buffer Type Descriptions16Chapter 5 Switching Hub Block Diagram17Figure 5.1 USB2524 Switching Hub Block Diagram17Chapter 6 Assigning Ports186.1 Port Assign Interface (PRT_ASSIGN[3:0] pins)186.1.1 Embedded Mode:18Table 6.1 USB2524 Port Assign Interface (Embedded Mode)186.1.2 Peripheral Mode: Level Triggered196.1.3 Peripheral Mode: Edge Triggered196.2 SMBus Host Control of Port Assignment19Chapter 7 Configuration Options207.1 Switching Hub Configuration Options207.1.1 Power Switching Polarity207.1.2 VBus Detect207.1.3 Port Assignment Configuration:207.1.4 Internal Register Set (Common to EEPROM and SMBus)20Table 7.1 Internal EEPROM & SMBus Register Memory Map207.2 EEPROM Interface407.2.1 I2C Master407.2.2 In-Circuit EEPROM Programming407.3 SMBus Slave Interface417.3.1 Bus Protocols41Figure 7.1 SMBus Block Write41Figure 7.2 SMBus Block Read427.3.2 Invalid Protocol Response Behavior427.3.3 General Call Address Response427.3.4 Slave Device Time-Out427.3.5 Stretching the SCLK Signal427.3.6 SMBus Timing427.3.7 Bus Reset Sequence437.3.8 SMBus Alert Response Address437.4 Default Strapping Option43Figure 7.3 LED Strapping Option437.5 Default Configuration43Chapter 8 LED Interface Description448.1 USB Mode:448.2 Basic Host Owner LED Indication:448.3 Host Ownership and Port Speed LED Indication:45Figure 8.1 Dual Color LED Implementation Example45Chapter 9 Reset479.1 Reset479.1.1 External Hardware RESET_N47Figure 9.1 Reset_N Timing for Default/Strap Option Mode48Table 9.1 Reset_N Timing for Default/Strap Option Mode48Figure 9.2 Reset_N Timing for EEPROM Mode49Table 9.2 Reset_N Timing for EEPROM Mode49Figure 9.3 Reset_N Timing for SMBus Mode50Table 9.3 Reset_N Timing for SMBus Mode509.1.2 USB Bus Reset50Chapter 10 XNOR Test52Chapter 11 DC Parameters5311.1 Maximum Guaranteed Ratings5311.1.1 DC Electrical Characteristics53Table 11.1 DC Electrical Characteristics53Chapter 12 AC Specifications5612.1 Oscillator/Clock5612.1.1 SMBus Interface:5612.1.2 I2C EEPROM:5612.1.3 USB 2.056Chapter 13 Package Outline57Figure 13.1 USB2524 56-Pin QFN Package Outline and Parameters57Size: 913 KBPages: 57Language: EnglishOpen manual
User ManualTable of ContentsChapter 1 General Description81.1 OEM Selectable Features9Chapter 2 Pin Layout10Table 2.1 USB2524 56-Pin QFN Pin Configuration Table10Chapter 3 Pin Configuration11Figure 3.1 USB2524 QFN-5611Chapter 4 Switching Hub Pin Descriptions12Table 4.1 Switching Hub Pin Descriptions12Table 4.2 SMBus or EEPROM Interface Behavior14Table 4.3 Miscellaneous Pins15Table 4.4 Power, Ground, and No Connect15Table 4.5 Buffer Type Descriptions16Chapter 5 Switching Hub Block Diagram17Figure 5.1 USB2524 Switching Hub Block Diagram17Chapter 6 Assigning Ports186.1 Port Assign Interface (PRT_ASSIGN[3:0] pins)186.1.1 Embedded Mode:18Table 6.1 USB2524 Port Assign Interface (Embedded Mode)186.1.2 Peripheral Mode: Level Triggered196.1.3 Peripheral Mode: Edge Triggered196.2 SMBus Host Control of Port Assignment19Chapter 7 Configuration Options207.1 Switching Hub Configuration Options207.1.1 Power Switching Polarity207.1.2 VBus Detect207.1.3 Port Assignment Configuration:207.1.4 Internal Register Set (Common to EEPROM and SMBus)20Table 7.1 Internal EEPROM & SMBus Register Memory Map207.2 EEPROM Interface407.2.1 I2C Master407.2.2 In-Circuit EEPROM Programming407.3 SMBus Slave Interface417.3.1 Bus Protocols41Figure 7.1 SMBus Block Write41Figure 7.2 SMBus Block Read427.3.2 Invalid Protocol Response Behavior427.3.3 General Call Address Response427.3.4 Slave Device Time-Out427.3.5 Stretching the SCLK Signal427.3.6 SMBus Timing427.3.7 Bus Reset Sequence437.3.8 SMBus Alert Response Address437.4 Default Strapping Option43Figure 7.3 LED Strapping Option437.5 Default Configuration43Chapter 8 LED Interface Description448.1 USB Mode:448.2 Basic Host Owner LED Indication:448.3 Host Ownership and Port Speed LED Indication:45Figure 8.1 Dual Color LED Implementation Example45Chapter 9 Reset479.1 Reset479.1.1 External Hardware RESET_N47Figure 9.1 Reset_N Timing for Default/Strap Option Mode48Table 9.1 Reset_N Timing for Default/Strap Option Mode48Figure 9.2 Reset_N Timing for EEPROM Mode49Table 9.2 Reset_N Timing for EEPROM Mode49Figure 9.3 Reset_N Timing for SMBus Mode50Table 9.3 Reset_N Timing for SMBus Mode509.1.2 USB Bus Reset50Chapter 10 XNOR Test52Chapter 11 DC Parameters5311.1 Maximum Guaranteed Ratings5311.1.1 DC Electrical Characteristics53Table 11.1 DC Electrical Characteristics53Chapter 12 AC Specifications5612.1 Oscillator/Clock5612.1.1 SMBus Interface:5612.1.2 I2C EEPROM:5612.1.3 USB 2.056Chapter 13 Package Outline57Figure 13.1 USB2524 56-Pin QFN Package Outline and Parameters57Size: 913 KBPages: 57Language: EnglishOpen manual
