SMSC LAN9420i Manual De Usuario

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

SMSC LAN9420/LAN9420i

169

Revision 1.22 (09-25-08)

 

Rev. 1.22

(09-23-08)

Added PCI SIG certification logo to cover

Rev. 1.21

(07-30-08)

Fixed error: Changed “To option..” text to 
“(optional)” and moved it to the end of the 
descriptions. 

- Changed “To option..” text to “(optional)” and 
moved it to the end of the descriptions. 
- Removed “To” from “To Ethernet”. 
- Placed bi-directional arrows on EEPROM, 
GPIO/LED, and PHY blocks.

Changed bits 9 and 15 to RESERVED with a 
default value of 0b. 

Added note to default value of Revision ID stating 
that the default value is dependent on device 
revision.

Changed default values of Min_Gnt and Max_Lat 
to 02h and 04h, respectively.

Changed last line of RX checksum calculation to 
“checksum = [B1, B0] + C0 + [B3, B2] + C1 + … 
+ [0, BN] + CN-1”

Added note: “When wake-up frame detection is 
enabled via the WUEN bit of the 

, a broadcast wake-

up frame will wake-up the device despite the state 
of the Disable Broadcast (BCAST) bit in the 

. “

Corrected GUE bit description to state: “....A global 
unicast frame has the MAC Address [0] bit set to 
0.”

Updated Drive Level from 0.5mW to 300uW. 

Fixed Pause Operation bit definitions to:
00 No PAUSE 
01 Symmetric PAUSE
10 Asymmetric PAUSE
11 Advertise support for both symmetric PAUSE 
and Asymmetric PAUSE

Added note stating: When both symmetric PAUSE 
and asymmetric PAUSE support are advertised 
(value of 11), the device will only be configured to, 
at most, one of the two settings upon auto-
negotiation completion.