Nokia 8390 Manuales De Servicio
PAMS Technical Documentation
System Module & UI
NSB-8
Issue 1 01/02
ãNokia Corporation
Page 31
Figure 7: RF Block Diagram
Frequency synthesizers
VCO frequency is locked with PLL into stable frequency source, which is a VCTCXO-mod-
ule (voltage controlled temperature compensated crystal oscillator). VCTCXO is running
at 26 MHz. Temperature drifting is con trolled with AFC (automatic frequency control)
voltage. VCTCXO is locked into frequency of the base station. AFC is generated by base-
band with a 11 bit conventional DAC. 13MHz VCTCXO can also be used if multislot oper-
ations is not needed. If more than 1(RX)+1(TX) slot is wanted settling times have to be
less than 300us from channel to channel. This can be achieved when the PLL loopband
width is ~35kHz. Noise coming from the loop and noise from dividers (20*logN) increases
rms phase error over 3 degrees which is the maximum for synthesizer.
ule (voltage controlled temperature compensated crystal oscillator). VCTCXO is running
at 26 MHz. Temperature drifting is con trolled with AFC (automatic frequency control)
voltage. VCTCXO is locked into frequency of the base station. AFC is generated by base-
band with a 11 bit conventional DAC. 13MHz VCTCXO can also be used if multislot oper-
ations is not needed. If more than 1(RX)+1(TX) slot is wanted settling times have to be
less than 300us from channel to channel. This can be achieved when the PLL loopband
width is ~35kHz. Noise coming from the loop and noise from dividers (20*logN) increases
rms phase error over 3 degrees which is the maximum for synthesizer.
Typical AGC step in LNA
30 dB
Usable input dynamic range
-102... -10 dBm
RSSI dynamic range
-110... -48 dBm
Compensated gain variation in receiving
band
+/- 1.0 dB
Table 19: Receiver characteristics
Item
Values (GSM1900)