Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos
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AT91SAM9N12-EK
Index
Index-2
Copyright © 2001-2003 ARM Limited. All rights reserved.
ARM DDI0198D
Cleaning DCache 9-3
Clock gating 5-32
Coarse page table descriptor 3-11
Context ID register 2-35
Control register 2-12
Conventions
Clock gating 5-32
Coarse page table descriptor 3-11
Context ID register 2-35
Control register 2-12
Conventions
Coprocessor
Ctype
D
DCache
Debug
Debug/test address register B-4
Descriptor
Descriptor
DTCM
E
F
Fault
Fault address register 2-20, 3-21
Fault status register 2-18, 3-21
FCSE PID register 2-34
FIFOFULL 10-2
Fine page table descriptor 3-12
Format, cache way and set way 4-9
FSR 2-18
Fault status register 2-18, 3-21
FCSE PID register 2-34
FIFOFULL 10-2
Fine page table descriptor 3-12
Format, cache way and set way 4-9
FSR 2-18
H
I
I and M bit settings
I bit 2-14
ICache
ICache
Instruction memory barrier 9-2
Instructions
Instructions
Interlocked MCR 8-7
Interrupts 8-10
Invalidate
Interrupts 8-10
Invalidate
cache 2-21
data TLB 2-25
data TLB single entry 2-25
ICache 9-4
instruction TLB 2-25
single entry 2-21
TLB 2-25
TLB single entry 2-25
data TLB 2-25
data TLB single entry 2-25
ICache 9-4
instruction TLB 2-25
single entry 2-21
TLB 2-25
TLB single entry 2-25
J
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