Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos
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AT91SAM9N12-EK
Memory Management Unit
ARM DDI0198D
Copyright © 2001-2003 ARM Limited. All rights reserved.
3-13
Table 3-6 shows the fine page table descriptor bit assignments.
3.2.7
Translating section references
Figure 3-8 on page 3-14 shows the complete section translation sequence.
Table 3-6 Fine page table descriptor bits
Bits
Description
[31:12]
These bits form the base for referencing the second-level descriptor (the fine page
table index for the entry is derived from the MVA)
table index for the entry is derived from the MVA)
[11:9]
Always written as 0
[8:5]
These bits specify one of the 16 possible domains (held in the domain access
control registers) that contain the primary access controls
control registers) that contain the primary access controls
[4]
Always written as 1
[3:2]
Always written as 0
[1:0]
These bits must be 11 to indicate a fine page table descriptor