Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos
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AT91SAM9N12-EK
343
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
28.6.1 PMECC
Configuration
Register
Name: PMECC_CFG
Address:
0xFFFFE000
Access:
Read-write
Reset:
0x00000000
• BCH_ERR: Error Correct Capability
• SECTORSZ: Sector Size
0: The ECC computation is based on a sector of 512 bytes.
1: The ECC computation is based on a sector of 1024 bytes.
• PAGESIZE: Number of Sectors in the Page
• NANDWR: NAND Write Access
:0: NAND read access.
1: NAND write access.
• SPAREEN: Spare Enable
– for NAND write access:
0: The spare area is skipped.
1: The spare area is protected with the last sector of data.
– for NAND read access:
0: The spare area is skipped.
1: The spare area contains protected data or only redundancy information.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
AUTO
–
–
–
SPAREEN
15
14
13
12
11
10
9
8
NANDWR
–
–
PAGESIZE
7
6
5
4
3
2
1
0
–
–
–
SECTORSZ
–
BCH_ERR
Value
Name
Description
0
BCH_ERR2
2 errors
1
BCH_ERR4
4 errors
2
BCH_ERR8
8 errors
3
BCH_ERR12
12 errors
4
BCH_ERR24
24 errors
Value
Name
Description
0
PAGESIZE_1SEC
1 sector for main area (512 or 1024 bytes)
1
PAGESIZE_2SEC
2 sectors for main area (1024 or 2048 bytes)
2
PAGESIZE_4SEC
4 sectors for main area (2048 or 4096 bytes)
3
PAGESIZE_8SEC
8 errors for main area (4096 or 8192 bytes)