Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos

457

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

DDRSDRC_HS

0xFFFFE82C

Read-write

See 

This register can only be written if the WPEN bit is cleared in 

.

0: Anticip read access is enabled.

1: Anticip read access is disabled (default).

DIS_ANTICIP_READ allows DDR2 read access optimization with multi-port.

As this feature is based on the “bank open policy”, the software must map different buffers in different DDR2 banks to take advan-
tage of that feature.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

–

–

–

–

DIS_ANTICIP_RE

AD

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–