Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos
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AT91SAM9N12-EK
534
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
33.7
USB Device Port (UDP) User Interface
WARNING: The UDP peripheral clock in the Power Management Controller (PMC) must be enabled before any read/write opera-
tions to the UDP registers, including the UDP_TXVC register.
tions to the UDP registers, including the UDP_TXVC register.
Notes: 1. Reset values are not defined for UDP_ISR.
2. See Warning above the
on this page.
Table 33-6. Register Mapping
Offset
Register
Name
Access
Reset
0x000
Frame Number Register
UDP_FRM_NUM
Read-only
0x0000_0000
0x004
Global State Register
UDP_GLB_STAT
Read-write
0x0000_0010
0x008
Function Address Register
UDP_FADDR
Read-write
0x0000_0100
0x00C
Reserved
–
–
–
0x010
Interrupt Enable Register
UDP_IER
Write-only
0x014
Interrupt Disable Register
UDP_IDR
Write-only
0x018
Interrupt Mask Register
UDP_IMR
Read-only
0x0000_1200
0x01C
Interrupt Status Register
UDP_ISR
Read-only
–
0x020
Interrupt Clear Register
UDP_ICR
Write-only
0x024
Reserved
–
–
–
0x028
Reset Endpoint Register
UDP_RST_EP
Read-write
0x0000_0000
0x02C
Reserved
–
–
–
0x030
Endpoint Control and Status Register 0
UDP_CSR0
Read-write
0x0000_0000
...
...
...
...
...
0x030 + 0x4 * 5
Endpoint Control and Status Register 5
UDP_CSR5
Read-write
0x0000_0000
0x050
Endpoint FIFO Data Register 0
UDP_FDR0
Read-write
0x0000_0000
...
...
...
...
...
0x050 + 0x4 * 5
Endpoint FIFO Data Register 5
UDP_FDR5
Read-write
0x0000_0000
0x070
Reserved
–
–
–
0x074
Transceiver Control Register
UDP_TXVC
Read-write
0x0000_0100
0x078 - 0xFC
Reserved
–
–
–