Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

Access to the USB host operational registers is achieved through the AHB bus slave interface. The OpenHCI host
controller initializes master DMA transfers through the ASB bus master interface as follows:



Fetches endpoint descriptors and transfer descriptors



Access to endpoint data from system memory



Access to the HC communication area



Write status and retire transfer Descriptor

Memory access errors (abort, misalignment) lead to an “UnrecoverableError” indicated by the corresponding flag in the
host controller operational registers.

The USB root hub is integrated in the USB host. Several USB downstream ports are available. The number
of downstream ports can be determined by the software driver reading the root hub’s operational registers. Device
connection is automatically detected by the USB host port logic. 

USB physical transceivers are integrated in the product and driven by the root hub’s ports.

Over current protection on ports can be activated by the USB host controller. Atmel’s standard product does not dedicate
pads to external over current protection.

PORT S/M

PORT S/M

USB transceiver

USB transceiver

DP

DM

DP

DM

Embedded USB

v2.0 Full-speed Transceiver

Root Hub

and

Host SIE 

List Processor

Block

FIFO 64 x 8

HCI 

Slave Block

OHCI

Registers

OHCI Root

Hub Registers

AHB

ED & TD

Regsisters

Control

HCI 

Master Block

Data

uhp_int

MCK

UHPCK

AHB

Slave

Master