Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Hoja De Datos

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
44.7.15 Base Layer Channel Enable Register
Name: 
LCDC_BASECHER
Address:
0xF8038040
Access: 
Write-only
Reset: 
0x00000000
• CHEN: Channel Enable Register
0: No effect.
1: Enable the DMA channel.
• UPDATEEN: Update Overlay Attributes Enable Register
0: No effect.
1: update windows attributes on the next start of frame.
• A2QEN: Add Head Pointer Enable Register
Write this field to one to add the head pointer to the descriptor list. This field is reset by hardware as soon as the head register is 
added to the list.
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A2QEN
UPDATEEN
CHEN